Through-Via Structure for Reliable Semiconductor Interconnects

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Solution Overview

Problem

Current semiconductor devices face challenges in achieving reliable electrical connections, which affects their overall performance and reliability, particularly due to complexities in the integration of advanced structures and materials.

Innovation Solution

The semiconductor device incorporates a through via structure that passes through the semiconductor substrate and etch stop films, connecting the contact electrode and lower wire structure, with a specific configuration of first and second portions of the through via, and utilizes etch stop films for precise etching and alignment, enhancing the reliability of electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a through via structure is used to connect contact electrode and lower wire structure, then electrical connection reliability is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidthrough via structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The through via is divided into a first portion and a second portion with different cross-sectional areas. The first portion has a larger cross-sectional area for better electrical connection with the contact electrode, while the second portion has a smaller cross-sectional area for easier formation and alignment. This segmentation allows each portion to be optimized for its specific function, improving overall connection reliability while managing manufacturing complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different portions of the through via have different cross-sectional areas tailored to their specific requirements. The first portion near the contact electrode has a larger area to ensure low-resistance electrical connection, while the second portion extending to the lower wire structure has a smaller area. This local variation in geometry optimizes electrical performance at critical interfaces while simplifying the overall structure.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If etch stop films are used for precise etching and alignment, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improveetching and alignment precisionVSAvoidetch stop film structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Etch stop films are formed in advance before the through via etching process. These pre-formed films serve as precise stopping points and alignment references during subsequent etching steps, ensuring accurate positioning of the through via relative to the contact electrode and lower wire structure. This preliminary preparation enables high manufacturing precision without requiring complex real-time control during etching.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The etch stop films act as intermediary layers between the various structural elements. They provide a controlled interface that facilitates precise etching depth control and alignment, mediating the relationship between the contact electrode, through via, and lower wire structure. This intermediary approach simplifies the overall manufacturing process by providing clear reference points.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240282828A1Semiconductor device and manufacturing method thereof
Publication Date: 2024.08.22 SAMSUNG ELECTRONICS CO LTD
  • US20240282828A1 patent drawing
  • US20240282828A1 patent drawing
  • US20240282828A1 patent drawing

AI summary

An embodiment provides a semiconductor device including a semiconductor substrate having first and second surfaces opposite each other, a channel pattern disposed on the first surface of the semiconductor substrate; source/drain patterns disposed on the first surface of the semiconductor substrate and disposed at both sides of the channel pattern; first and second etch stop films disposed on the first surface of the semiconductor substrate; a contact electrode electrically connected to the source/drain patterns; a lower wire structure disposed on the second surface of the semiconductor substrate; and a through via that passes through the semiconductor substrate, the first etch stop film, and the second etch stop film to connect the contact electrode and the lower wire structure, wherein the through via includes a first portion contacting the contact electrode and a second portion contacting the first portion and disposed between the first portion and the lower wire structure.