Through-Via Package Structure for Stress-Balanced Interconnects
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Solution Overview
Problem
Existing semiconductor package structures face issues with stress accumulation and the formation of cracks or voids during the packaging process, particularly due to mismatched coefficients of thermal expansion between conductive and passivation layers, and unbalanced stress distribution caused by the alignment of through via structures and conductive connectors.
Innovation Solution
The package structure incorporates a conductive structure with a first via portion directly connected to a through via structure and a second via portion with one end connected to the substrate, where the second via portion is used to balance stress and prevent cracking by being directly below the conductive connector, and the formation of a specific ratio of the second via portion to the conductive connector area reduces stress without affecting routing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If through via structures are aligned with conductive connectors, then routing efficiency is improved, but stress concentration and crack formation increase due to unbalanced stress distribution
Solution Approach 1:
The conductive structure is divided into two separate via portions: a first via portion that aligns with the through via structure for routing efficiency, and a second via portion that is offset from the through via structure to balance stress distribution. This segmentation allows each via portion to serve a specific function, resolving the contradiction between routing efficiency and stress balance.
Solution Approach 2:
Different regions of the conductive structure are designed with different via configurations. The first via portion is positioned to optimize electrical routing, while the second via portion is positioned specifically to address stress concentration issues. This local differentiation allows the structure to simultaneously achieve good routing efficiency and balanced stress distribution in different areas.
2Ease of manufacture
If conductive and passivation layers are used with mismatched coefficients of thermal expansion, then manufacturing flexibility is improved, but stress accumulation and void formation increase during packaging
Solution Approach 1:
The invention changes the geometric parameters of the conductive structure by introducing a second via portion with specific dimensions and positioning. This via portion is designed with a cross-sectional area ratio between 0.1 to 0.5 relative to the conductive connector, which optimizes stress distribution and prevents void formation while maintaining manufacturing flexibility.
3Device complexity
If a single via structure is used for electrical connection, then device complexity is reduced, but stress concentration and crack formation increase
Solution Approach 1:
The conductive structure is segmented into two via portions with distinct functions. The first via portion provides the primary electrical connection, while the second via portion serves as a stress-relief feature. This segmentation increases structural reliability without significantly complicating the overall device design.
Solution Approach 2:
The second via portion acts as an intermediary element between the first via portion and the surrounding passivation layer. It mediates the stress distribution by providing an additional conductive path that relieves concentration stresses, thereby preventing crack formation while maintaining electrical functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the formation of cracks and voids, enhancing the reliability and yield of the package structure by balancing stress distribution and minimizing material mismatch-induced failures.
Implementation Method 1
the second via portion is used to balance stress and prevent cracking by being directly below the conductive connector
Implementation Method 2
mismatched coefficients of thermal expansion between conductive and passivation layers
Data Source
AI summary
A package structure and method for forming the same are provided. The package structure includes a first through via structure formed in a substrate and a semiconductor die formed below the first through via structure. The package structure further includes a conductive structure formed in a passivation layer over the substrate. The conductive structure includes a first via portion and a second via portion, the first via portion is directly over the first through via structure, and there is no conductive material directly below and in direct contact with the second via portion.


