Through-Via Test Structure for Accurate Resistance Measurement
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Solution Overview
Problem
The existing test keys for semiconductor devices are prone to deformation due to their location at the periphery of the device, leading to inaccurate resistance testing of vias.
Innovation Solution
A semiconductor structure is designed with a semiconductor substrate, multiple metal layers, and an insulating layer, featuring at least four vias that connect the metal layers, providing structural support and facilitating accurate resistance testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a test key is located at the periphery of a device, then it is easy to form and access, but it causes deformation of the via making test results inaccurate
Solution Approach 1:
The patent creates a copy of the via structure by forming a plug in the via that replicates the conductive material and dimensional characteristics of the actual via. This plug serves as a test key that accurately represents the via's resistance properties while being located at the periphery for easy access, thus resolving the contradiction between ease of manufacture and measurement precision
Solution Approach 2:
The patent segments the via testing function from the actual via by creating a separate plug structure within the via. This plug can be independently formed and measured, allowing the test key to be located at the periphery without affecting the actual via performance, thereby enabling accurate resistance testing while maintaining ease of access
2Ease of operation
If a test key is located at the periphery of a device, then it is accessible for testing, but there are no other patterns around it causing via deformation
Solution Approach 1:
The plug serves as a stable structural copy of the via that can be located at the periphery for easy access during testing. The plug's structure is designed to match the via's dimensions and material properties, providing structural stability while enabling peripheral accessibility for testing operations
3Stability of the object's composition
If multiple vias are used to connect metal layers, then structural support is improved reducing deformation, but device complexity increases
Solution Approach 1:
The patent segments the via structure into multiple plugs within the same via, where each plug serves a specific function. This segmentation provides structural support to prevent deformation while keeping the overall via count manageable, as the multiple plugs are contained within a single via location rather than requiring multiple separate vias
Solution Approach 2:
The patent implements nesting by placing multiple plugs inside a single via structure. The plugs are nested within the via's conductive material, providing structural support and testing functionality without increasing the number of via holes that need to be formed through the insulating layer, thus reducing device complexity while maintaining structural stability
Data Source
AI summary
A semiconductor structure includes: a semiconductor substrate; a first metal layer located on a surface of the semiconductor substrate; a second metal layer located above a surface of the first metal layer; an insulating layer located between the first metal layer and the second metal layer and configured to isolate the first metal layer from the second metal layer; and at least four vias located in the insulating layer and a conductive material for connecting the first metal layer and the second metal layer is filled in the at least four vias.