Through Wafer Via Array for Signal Integrity
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Solution Overview
Problem
Existing through via schemes for integrated circuit chips face challenges in integrating high-frequency and DC signal interconnections between the top and bottom surfaces, often resulting in signal degradation.
Innovation Solution
The development of an array of through wafer vias, comprising both electrically conductive and non-conductive vias extending from the top to the bottom surface of a semiconductor substrate, with conductive vias fully extending through the chip and non-conductive vias partially extending for isolation, using a method that involves trench formation, dielectric and conductive material filling, and substrate thinning to expose these vias at the new bottom surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If through vias are formed to enable interconnections between top and bottom surfaces, then device density increases, but signal degradation occurs
Solution Approach 1:
The through via structure is segmented into multiple functional regions: an upper via portion for signal transmission, a middle isolation region with dielectric material to prevent signal degradation, and a lower via portion for interconnection. This segmentation allows each region to perform its specific function optimally while maintaining overall signal integrity.
Solution Approach 2:
Different regions of the through via structure are assigned different material properties: conductive materials (metal fills) in signal transmission regions, and insulating dielectric materials in isolation regions. This local differentiation of material quality enables simultaneous achievement of signal transmission and degradation prevention.
2Adaptability or versatility
If existing through via schemes are used, then interconnections are established, but integration into existing fabrication processes becomes difficult
Solution Approach 1:
The method performs preliminary actions by forming the via structure, filling with dielectric material, and preparing isolation regions before final metalization steps. This preliminary structuring allows subsequent fabrication steps to proceed using existing process flows, improving ease of manufacture.
Solution Approach 2:
The through via structure serves multiple functions: signal transmission, electrical isolation, and mechanical support. By designing a multi-functional structure that can be integrated into existing fabrication processes, the invention achieves both interconnection capability and ease of manufacture.
3Adaptability or versatility
If conductive through vias extend fully through the substrate, then DC signal transmission is enabled, but high-frequency signal degradation increases
Solution Approach 1:
The conductive via path is segmented by inserting dielectric isolation regions at intermediate depths. This creates separate upper and lower conductive portions that are electrically isolated from the substrate, enabling DC transmission while reducing high-frequency degradation through the segmented structure.
Solution Approach 2:
Dielectric material acts as an intermediary between the upper and lower conductive via portions. This intermediary layer provides electrical isolation that prevents substrate-induced signal degradation while maintaining the through-via interconnection function for both DC and high-frequency signals.
Data Source
AI summary
A through wafer via structure. The structure includes: a semiconductor substrate having a top surface and an opposite bottom surface; and an array of through wafer vias comprising at least one electrically conductive through wafer via and at least one electrically non-conductive through wafer via, each through wafer via of the array of through wafer vias extending from the top surface of the substrate to between greater than halfway to and all the way to the bottom surface of the substrate. Also methods for fabricating the though wafer via structure.