Thru Vias Grounding for Low Signal Loss in Electronic Packaging

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Solution Overview

Problem

Current electronic device packaging technologies face challenges in minimizing signal attenuation, especially at high frequencies, due to the use of embedded grounding planes which result in significant transmission loss.

Innovation Solution

The proposed solution involves an electronic device design that includes a dielectric layer with openings for dies, an encapsulating material, and an electrically conductive carrier in the form of thru vias, which are used to ground the device and reduce electromagnetic interference, while maintaining a low dielectric constant to minimize signal loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If embedded grounding planes are used in conventional packaging, then grounding and EMI shielding are achieved, but signal attenuation increases significantly at high frequencies

Engineering Contradiction:
Improveelectromagnetic interference shieldingVSAvoidsignal transmission loss
Core Design Contradiction:
Object-affected harmful factorsVSLoss of energy

Solution Approach 1:

The invention extracts the grounding function from the traditional embedded grounding plane and relocates it to discrete grounding vias positioned at specific locations around the die. This extraction allows the signal path to avoid the lossy grounding plane structure while maintaining EMI shielding through strategically placed via structures.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention introduces an intermediary structure - the grounding via with its specific geometry and positioning - that mediates between the need for EMI shielding and the requirement for low signal loss. The via structure acts as a localized shielding element without creating the continuous lossy path of an embedded grounding plane.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If traditional packaging structures are used, then manufacturing simplicity is maintained, but high-frequency signal transmission performance deteriorates

Engineering Contradiction:
Improvepackaging structure fabricationVSAvoidhigh-frequency signal transmission
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The invention applies local quality by concentrating grounding functionality at specific localized via positions rather than using a continuous grounding plane. This localized approach maintains manufacturing simplicity while improving high-frequency performance by eliminating the distributed losses associated with extensive grounding structures.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention changes key parameters of the grounding structure - transitioning from a continuous plane to discrete vias, optimizing via diameter, depth, and spacing parameters. These parameter changes enable better high-frequency signal transmission while maintaining ease of manufacture through standard via fabrication processes.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly reduces the attenuation constant for high-frequency signals, offering lower transmission loss compared to conventional devices with embedded grounding planes, particularly for frequencies up to 90 GHz.

Implementation Method 1

maintaining a low dielectric constant to minimize signal loss

Methodology Applied
Scientific EffectDielectric: Dielectric

Implementation Method 2

an electrically conductive carrier in the form of thru vias, which are used to ground the device and reduce electromagnetic interference

Methodology Applied
Scientific EffectElectromagnetic interference shielding: Faraday Cage

Data Source

PatentUS8293588B2Method of providing an electronic device including dies, a dielectric layer, and an encapsulating layer
Publication Date: 2012.10.23 NXP USA INC
  • US8293588B2 patent drawing
  • US8293588B2 patent drawing
  • US8293588B2 patent drawing

AI summary

A method of packaging an electronic device includes providing a patterned dielectric layer with an area sized to receive a first die, and another area sized to receive a second die, placing the first and second dies within the first and second areas, encapsulating the dies with an encapsulating material that has a different composition from the dielectric layer, forming a first signal line between the dies, forming a second signal line to the first die, and forming an additional signal line to the first die. The dielectric layer is disposed between the first signal line and the encapsulating material, the electronic device transmits a signal in an approximate range of 1 GHz to 100 GHz along the second signal line, and a signal that does not exceed approximately 900 MHz along the additional signal line.