THx2 Threshold Gate Cell for Side-Channel-Resistant Asynchronous Logic
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Solution Overview
Problem
Integrated circuit devices are vulnerable to side-channel attacks through Trojan circuits, which can leak secret information during regular operation, and existing technologies struggle to mitigate these attacks while minimizing power consumption and manufacturing costs.
Innovation Solution
The THx2 threshold gate cell, with a mode-independent PMOS configuration and NMOS configuration capable of operating in TH12 and TH22 modes, is designed to form a complete set of asynchronous logic, utilizing CMOS transistors to implement both modes and mitigate side-channel attacks by minimizing area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional synchronous logic circuits are used, then manufacturing is simpler and speed is higher, but power consumption increases and vulnerability to side-channel attacks occurs
Solution Approach 1:
The patent changes the fundamental operating parameter from synchronous clocked operation to asynchronous event-driven operation. This parameter change enables the circuit to operate only when data is available, eliminating continuous clock signaling and reducing power consumption while providing inherent security through irregular timing patterns that prevent side-channel analysis
2Reliability
If asynchronous logic is used to mitigate side-channel attacks, then security is improved, but device complexity increases
Solution Approach 1:
The patent segments the logic circuit into independent threshold gate units that can be composed to form complex functions. Each threshold gate is a simple modular building block with standardized inputs and outputs, allowing complex asynchronous logic to be constructed from simple, repeatable units, thereby managing complexity through modular design
3Productivity
If more logic is added to semiconductor wafer, then productivity increases, but vulnerability to Trojan circuits and side-channel attacks increases
Solution Approach 1:
The patent applies different operational characteristics to different parts of the logic circuit. Each threshold gate unit operates independently with its own switching behavior, creating locally varied timing patterns across the chip. This local quality variation makes it difficult for Trojan circuits to predict or exploit systematic patterns, thereby reducing attack vulnerability while maintaining high logic density
Data Source
AI summary
Systems and methods of use and fabrication are described for a THx2 threshold gate cell for a programmable gate array including a mode-independent PMOS configuration and an NMOS configuration configured to operate in one of a TH12 mode and a TH22 mode, wherein x is set to a threshold of 1 for the TH12 mode and x is set to a threshold of 2 for the TH22 mode.


