Thyristor Gate Polygon Layout for High dI/dt and Fast Turn-Off

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

State-of-the-art thyristors fail to simultaneously achieve high dI/dt and dV/dt capability and low turn-off time, with existing designs often sacrificing one parameter for the other, and face challenges in large area devices due to complex manufacturing processes.

Innovation Solution

A power semiconductor device with a semiconductor wafer comprising parallel thyristor cells, where the gate electrodes form multiple polygons with at least four struts, and cathode regions of small islands are homogeneously distributed and completely surrounded by gate metallization, allowing for optimal placement of cathode short areas to enhance dI/dt and dV/dt capability while minimizing turn-off time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the gate electrode is uniformly distributed over the cathode area to maximize the gate-cathode boundary, then the dV/dt capability and turn-off time are improved, but the dI/dt capability is limited

Engineering Contradiction:
Improveturn-off timeVSAvoiddI/dt capability limitation
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The gate electrode is segmented into multiple discrete gate strips arranged in a specific pattern rather than being uniformly distributed. This segmentation allows different regions to serve different functions: some areas provide fast turn-off capability while others facilitate rapid current rise during turn-on, resolving the contradiction between dV/dt and dI/dt capabilities

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the cathode area are assigned different gate electrode densities and configurations. The gate strips are positioned to create localized zones with optimized characteristics for either fast commutation or high dI/dt capability, rather than applying a uniform design across the entire cathode area

Inventive Principle:
Principle #3Local quality

2Productivity

If a distributed amplifying gate structure is used to extend the gate electrode boundary, then the turn-on speed and dI/dt capability are improved, but the manufacturing complexity increases

Engineering Contradiction:
Improveturn-on speedVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The gate electrode is divided into multiple parallel strips rather than using a complex distributed amplifying gate structure. This simplified segmentation achieves effective turn-on propagation while significantly reducing manufacturing complexity compared to distributed amplifying gate designs

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of extending the gate boundary outward with complex distributed structures, the invention inverts the approach by creating multiple parallel gate strips within the available space, achieving similar or superior performance with simpler manufacturing

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS20230317818A1Power semiconductor device
Publication Date: 2023.10.05 HITACHI ENERGY LTD
  • US20230317818A1 patent drawing
  • US20230317818A1 patent drawing
  • US20230317818A1 patent drawing

AI summary

Disclosed is a power semiconductor device comprising a semiconductor wafer having a first main side and second main side. The semiconductor wafer comprises parallel thyristor cells, which each comprises (a) a cathode electrode and gate electrode on the first main side; (b) a cathode layer comprising a cathode region of a first conductivity type, forming an ohmic contact with the cathode electrode; (c) a first base layer of a second conductivity type, wherein the cathode region forms a p-n junction between the first base layer and cathode region; (d) a second base layer of the first conductivity type forming a second p-n junction with the first base layer; (e) an anode layer of the second conductivity type separated from the first base layer by the second base layer. The gate electrodes of the plurality of thyristor cells form a gate design comprising multiple polygons each comprising at least four struts.