Thyristorized ESD Diode Layout for Bidirectional Surge Protection
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Solution Overview
Problem
Semiconductor devices with EIS diode structures have limited electrostatic surge tolerance, making them vulnerable to electrostatic discharges and overvoltages, which can lead to malfunction or damage.
Innovation Solution
Incorporating a thyristor structure with p-type dopant regions and a specific diode structure that includes a p-type base region, n-type source region, and a gate structure, along with a semiconductor layer of opposite conductivity type, to enhance electrostatic surge tolerance by allowing forward and reverse current handling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an EIS diode structure is used, then the device has simple structure and ease of manufacture, but the electrostatic surge tolerance is limited
Solution Approach 1:
The patent combines a diode structure with a thyristor structure into a single integrated device. The diode portion provides basic rectification while the thyristor portion with its gate electrode, insulator layer, and semiconductor layers provides electrostatic surge protection. This merging allows the device to handle both forward and reverse overcurrents and overvoltages, significantly improving electrostatic surge tolerance without requiring separate protection circuits.
Solution Approach 2:
The semiconductor device achieves multi-functionality by integrating both diode and thyristor functions in one structure. It can operate as a rectifier for normal signal processing and simultaneously provide electrostatic surge protection in both forward and reverse directions. The gate electrode structure allows controlled switching to divert surge currents, making the device universally applicable for both signal handling and protection functions.
2Reliability
If an EIS diode structure is used, then the device has simple structure, but it is vulnerable to electrostatic discharges and overvoltages
Solution Approach 1:
The patent merges diode and thyristor fabrication processes into a unified manufacturing flow. The insulator layer is formed on the semiconductor substrate, followed by deposition of the gate electrode material. The doping regions (n-type and p-type) are created in specific patterns to form both the diode junction and thyristor structure simultaneously. This integrated approach improves electrostatic discharge resistance while maintaining manufacturing efficiency through process consolidation.
3Reliability
If a thyristor structure is added to enhance electrostatic surge tolerance, then the protection capability is improved, but the device complexity increases
Solution Approach 1:
The patent implements a nested structure where the gate electrode and insulator layer are positioned within and around the semiconductor layers. The n-type and p-type semiconductor layers are arranged in a nested configuration with the insulator layer embedded between them. This nesting allows the thyristor protection mechanism to be integrated within the compact diode structure, providing enhanced electrostatic surge tolerance without proportionally increasing the device footprint or apparent complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly improves electrostatic surge tolerance by enabling the semiconductor device to handle both forward and reverse overcurrents and overvoltages effectively, preventing damage from electrostatic discharges and maintaining operational stability.
Implementation Method 1
a gate insulation film that covers the channel region at the top of the semiconductor substrate; The gate electrode is formed on the gate insulation film, and faces the channel region across the gate insulation film
Implementation Method 2
The base region is formed in a superficial part of the semiconductor substrate... The source region is formed in a superficial part of the base region... The anode region is formed in a superficial part of the base region... The cathode region is formed in a superficial part of the semiconductor substrate
Data Source
AI summary
A semiconductor device includes, as each of a first electrostatic protection diode, a second electrostatic protection diode, and a third electrostatic protection diode, a lateral NDMOS transistor thyristorized by having a p-type dopant region formed in its drain. For example, the anode of the first electrostatic protection diode is connected to a first signal terminal; the anode of the second electrostatic protection diode is connected to a second signal terminal; and the anode of the third electrostatic protection diode is connected to a ground terminal. The cathodes of the first, second, and third electrostatic protection diodes are connected together.