Time-Interleaved ADC Bandwidth Mismatch Estimation and Compensation
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Solution Overview
Problem
Current time-interleaved analog-to-digital converters (TI ADCs) face challenges in accurately determining and compensating for bandwidth mismatches, which significantly affect performance, especially at high accuracy and high speed, and existing circuits do not adequately address blind bandwidth mismatch estimation.
Innovation Solution
The solution involves a system with multiple ADC branches, each equipped with an autocorrelation estimator and a mismatch estimation circuit that adjusts filter characteristics and gain to determine and compensate for bandwidth mismatches through a cost function optimization process, ensuring matching of bandwidths within 0.1% to 0.25% to achieve desired Spurious-Free Dynamic Range (SFDR).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional T/H circuits with fixed filter characteristics are used in TI ADCs, then the circuit complexity is low and ease of manufacture is good, but bandwidth mismatches occur between ADC branches that significantly degrade SFDR performance at high accuracy and high speed
Solution Approach 1:
The patent applies dynamics by making the T/H circuit filter characteristics adjustable rather than fixed. The mismatch estimation circuit dynamically adjusts the filter characteristics (such as time constant or cutoff frequency) of each ADC branch's T/H circuit based on estimated bandwidth mismatches, enabling the system to adapt and compensate for variations while maintaining relatively simple circuit structures.
2Measurement precision
If bandwidth mismatch correction is implemented to achieve high SFDR performance, then measurement precision improves, but the difficulty of detecting and measuring bandwidth mismatches increases
Solution Approach 1:
The patent implements feedback through the mismatch estimation circuit that continuously estimates bandwidth mismatches between ADC branches and feeds this information back to adjust the T/H circuit filter characteristics. This closed-loop feedback mechanism enables automatic compensation for bandwidth mismatches, improving SFDR performance without requiring complex external measurement equipment or manual calibration procedures.
Solution Approach 2:
The system applies self-service by enabling the TI ADC to automatically detect and correct its own bandwidth mismatches through the integrated mismatch estimation circuit. The circuit uses the ADC's own output signals to estimate mismatches and adjust its parameters, eliminating the need for external test equipment or manual intervention, thereby simplifying the detection and measurement process.
3Productivity
If multiple ADC branches are used to increase sampling speed, then productivity improves, but bandwidth mismatches between branches worsen and significantly affect performance
Solution Approach 1:
The patent applies parameter changes by adjusting the filter characteristics (such as time constant or cutoff frequency) of each ADC branch's T/H circuit to compensate for bandwidth mismatches. The mismatch estimation circuit estimates the bandwidth parameters of each branch and modifies the filter parameters accordingly, enabling multiple ADC branches to operate with matched bandwidths despite manufacturing variations, thereby maintaining high sampling speed and performance.
Data Source
AI summary
With high speed, high resolution time-interleaved (TI) analog-to-digital converters (ADCs), bandwidth mismatches between the various ADC branches can pose a significant problem. Previously, though, no adequate solution has been found. Here, a method and apparatus are provided that can calculate and compensate for bandwidth mismatches in a TI ADC, enabling a high speed, high resolution TI ADC to be produced.