High-Speed TIA Filter Layout for 5G WiFi EMI Cancellation
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Solution Overview
Problem
Existing solutions for mitigating 5G WiFi electromagnetic interference in high-speed transimpedance amplifiers (TIAs) are ineffective, particularly due to the failure to consider interference from the lens opening, which reduces receiving sensitivity and shortens signal recognition distance.
Innovation Solution
The proposed method involves stacking high-voltage capacitors and resistors on the bare DIE chip of the TIA, constructing differential outputs to cancel signal interference, and integrating these components inside the current mirror chip to form a filter circuit that effectively cancels out electromagnetic interference from both metal pins and lens leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high-speed TIA bandwidth is increased to improve signal reception speed, then signal recognition distance is extended, but the TIA becomes more susceptible to 5G WiFi electromagnetic interference within its bandwidth
Solution Approach 1:
The patent implements filter circuits that are pre-configured and stacked directly on the TIA chip before operation. These filters are designed to preemptively block 5G WiFi frequency bands (5-6 GHz) before the interference can affect the high-speed TIA signal reception, allowing the TIA to maintain its high bandwidth without increased susceptibility to interference.
2Ease of manufacture
If stacked filter circuits are implemented on the TIA bare DIE chip, then manufacturing cost is reduced and anti-interference performance is improved, but the wiring complexity and layout precision requirements increase
Solution Approach 1:
The patent merges the filter circuit components (capacitors, resistors, inductors) and their interconnections into a single stacked assembly that is placed as one unit on the TIA bare DIE chip. This merging reduces the number of separate wiring operations and simplifies the layout requirements, making the manufacturing process more feasible despite the increased precision needs.
Solution Approach 2:
The patent employs a nested stacking architecture where smaller components (resistors, capacitors) are stacked on top of larger components (inductors, TIA chip), creating a compact three-dimensional structure. This nesting reduces the overall footprint and simplifies the wiring paths between components, thereby reducing layout complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly enhances the anti-5G WiFi electromagnetic interference performance of high-speed TIAs, improving receiving sensitivity and extending the maximum signal recognition distance while reducing manufacturing costs.
Implementation Method 1
stacking high-voltage capacitors and resistors on the bare DIE chip of the TIA, constructing differential outputs to cancel signal interference, and integrating these components inside the current mirror chip to form a filter circuit
Implementation Method 2
stacking high-voltage capacitors and resistors on the bare DIE chip of the TIA, constructing differential outputs to cancel signal interference, and integrating these components inside the current mirror chip to form a filter circuit
Implementation Method 3
At the receiving end (ROSA) of the optical fiber communication module, the optical signal is converted into a current signal through an avalanche photodiode (APD)
Implementation Method 4
When the avalanche photodiode (APD) is working normally, a reverse bias high voltage of about 45V is required at both ends to form an avalanche state for the electrons inside it, which amplifies the weak photocurrent
Data Source
AI summary
A high-speed TIA anti-5G WIFI electromagnetic interference method includes the steps of: stacking a high-voltage capacitor C9 and a resistor R11 for constructing a filter circuit on a bare DIE chip of TIA; splitting C9 into two parallel filter capacitors C91 and C92, which satisfy C9=C91+C92, C91=C92; constructing differential output to cancel signal interference; constructing electromagnetic interference that cancels out lens leakage by stacking avalanche photodiode APD, C91 and gold-plated pad on the vertical axis close to the bare DIE chip, and connecting to the pads through gold wires; stacking R11 and C92 on the vertical axis between pins VDD and VAPD, connecting R11 to C91 through gold wire No. 1, connecting C92 to pin VAPD through gold wire No. 2, the gold wire No. 1 and the gold wire No. 2 form a 90° angle to offset the electromagnetic interference leaked by the lens.