Tier Control Units for Cache Coherency
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Solution Overview
Problem
Conventional cache coherency systems in multi-controller architectures face issues with increased wire lengths, circuit area, power consumption, and timing congestion due to the use of global interconnects for maintaining cache coherency across multiple domains, which limits performance and increases costs.
Innovation Solution
The implementation of tier control units (TCUs) that maintain cache coherency by operatively coupling to local interconnects within each domain, allowing for a tiered coherency structure that reduces circuit area, power consumption, and bandwidth requirements, while supporting a tiered architecture that efficiently handles cache line requests and responses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If global interconnects are used to maintain cache coherency across multiple domains, then cache coherency can be maintained, but wire lengths increase, circuit area increases, power consumption increases, and timing congestion occurs
Solution Approach 1:
The system segments the cache coherency management into hierarchical domains with local interconnects handling domain-level coherency and global interconnects handling cross-domain coherency. This segmentation reduces the burden on global interconnects and allows for more efficient local management, thereby reducing overall wire lengths and circuit area while maintaining coherency.
Solution Approach 2:
The patent introduces a hierarchical dimension to cache coherency management by organizing controllers into domains with local interconnects, adding a layer between individual controllers and the global interconnect. This dimensional change reduces the direct connectivity requirements and allows for more compact circuit design with reduced area.
2Reliability
If global interconnects are used to maintain cache coherency across multiple domains, then cache coherency can be maintained, but wire lengths increase, circuit area increases, power consumption increases, and timing congestion occurs
Solution Approach 1:
The system segments the cache coherency management into hierarchical domains with local interconnects handling domain-level coherency and global interconnects handling cross-domain coherency. This segmentation reduces the burden on global interconnects and allows for more efficient local management, thereby reducing overall wire lengths and circuit area while maintaining coherency.
Solution Approach 2:
Local interconnects act as intermediaries between controllers within domains and the global interconnect. This intermediary layer reduces the need for long direct wire connections between all controllers and the global interconnect, thereby reducing overall wire lengths and timing congestion.
3Reliability
If global interconnects are used to maintain cache coherency across multiple domains, then cache coherency can be maintained, but power consumption increases
Solution Approach 1:
The system segments the cache coherency management into hierarchical domains with local interconnects handling domain-level coherency and global interconnects handling cross-domain coherency. This segmentation reduces the burden on global interconnects and allows for more efficient local management, thereby reducing overall wire lengths and circuit area while maintaining coherency.
Solution Approach 2:
The patent implements local coherency management within domains using local interconnects, allowing each domain to manage its own coherency requirements independently. This local quality approach reduces the need for frequent global interconnect transactions, thereby reducing overall power consumption.
4Reliability
If global interconnects are used to maintain cache coherency across multiple domains, then cache coherency can be maintained, but timing congestion occurs
Solution Approach 1:
The system segments the cache coherency management into hierarchical domains with local interconnects handling domain-level coherency and global interconnects handling cross-domain coherency. This segmentation reduces the burden on global interconnects and allows for more efficient local management, thereby reducing overall wire lengths and circuit area while maintaining coherency.
Solution Approach 2:
Local interconnects act as intermediaries between controllers within domains and the global interconnect. This intermediary layer reduces the need for long direct wire connections between all controllers and the global interconnect, thereby reducing overall wire lengths and timing congestion.
Data Source
AI summary
Cache coherency of a global address space of a cache can be maintained with one or more tier control units (TCUs). The global address space of the cache may be shared by multiple domains. Domains may include multiple controllers and a local interconnect operatively coupling the controllers to the cache. The local interconnect of each domain may maintain a cache coherency of a local address space of the cache shared by the controllers of the domain. The one or more TCUs may be operatively coupled to the local interconnects of the domains to maintain the cache coherency of the global address space.