Tiered Gate Transistor Passivation for Parasitic Capacitance
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Solution Overview
Problem
T-gate structure transistors face issues with non-uniform passivation coverage around the gate foot, leading to reliability and performance problems due to increased capacitance between the gate and source/drain, and voids formed during metal evaporation, which degrade the frequency response.
Innovation Solution
A tiered gate structure with a passivation layer extending along the source, drain, and sidewalls of the gate foot, recessed from the top portion to support the gate head, reducing parasitic capacitances and improving structural integrity by using dissimilar resist layers for precise e-beam lithography and deposition techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the gate foot height is reduced to achieve short gate lengths, then gate length is improved, but parasitic capacitance increases and passivation coverage deteriorates
Solution Approach 1:
The gate structure is segmented into two distinct parts: a gate foot portion and a gate head portion. The gate foot has a first height while the gate head has a second height greater than the first height. This segmentation allows the gate foot to provide adequate passivation coverage area while the gate head maintains the short gate length requirement for high-frequency operation.
Solution Approach 2:
The invention transitions from a single-height gate structure to a tiered multi-height structure by adding vertical dimension differentiation. The gate head extends higher than the gate foot, creating a stepped configuration that resolves the contradiction between short gate length and adequate passivation coverage area.
2Ease of manufacture
If metal evaporation is performed on the T-gate structure, then gate metallization is achieved, but voids form between gate foot and gate head reducing reliability
Solution Approach 1:
A spacer layer is deposited beforehand on the gate foot before metal evaporation. This preliminary action creates a support structure that prevents void formation during subsequent metal deposition, ensuring structural integrity while maintaining ease of metallization.
Solution Approach 2:
The spacer layer acts as an intermediary between the gate foot and the metal gate head. This intermediate layer fills the gap and provides a bridge that prevents void formation during metal evaporation, resolving the reliability issue while maintaining manufacturability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances passivation coverage, reduces gate-to-source and gate-to-drain capacitances, and increases the structural integrity of the T-gate structure, improving reliability and frequency response by ensuring uniformity and reducing voids and parasitic capacitances.
Implementation Method 1
Most T-gate processes utilize electron beam lithography to produce short gate length devices
Implementation Method 2
electrons undergo forward and back scattering during exposure which limit the minimum feature size
Implementation Method 3
the passivation layer can insulate the surface of the substrate 110 from the ambient environment and prevent the surface from oxidizing. The passivation layer may be a nitride layer formed on the substrate 110 by using a plasma enhanced chemical vapor deposition process
Data Source
AI summary
In various embodiments, a tiered gate structure transistor is provided including a source, a drain, and a gate between the source and the drain. The tiered gate structure transistor including a gate foot having a top portion and sidewalls. A gate head is attached to the top portion of the gate foot. A passivation layer extends along and directly contacts an uppermost surface of the source, and extends along and directly contacts an uppermost surface of the drain, the passivation layer surrounds the sidewalls of the gate foot such that the top portion is not covered by the passivation layer and such that the passivation layer surrounding the sidewalls supports the gate head.