Tiered Memory Stack Trenches to Prevent Leakage and Tier Deformation
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Solution Overview
Problem
Conventional methods for forming vertical memory arrays in non-volatile memory devices, such as NAND Flash memory, result in undesirable current leaks and short circuits due to conductive material depositions and tier deformations, leading to performance and reliability issues.
Innovation Solution
The formation of a microelectronic device structure with a stadium structure configuration, including vertically extending trenches and dielectric material fill, which inhibits tier deformations and provides structural integrity, reducing the risk of current leaks and short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional methods of forming vertical memory arrays are used, then memory density is increased, but current leaks and short circuits occur due to conductive material depositions and tier deformations
Solution Approach 1:
The patent divides the stack structure into discrete blocks and sub-blocks separated by trenches. This segmentation prevents conductive material from forming continuous deformation paths across the entire stack, thereby reducing current leaks and short circuits while maintaining high memory density through vertical stacking.
Solution Approach 2:
The patent performs preliminary partitioning of the stack structure into blocks and sub-blocks before forming conductive structures. This preliminary action prevents subsequent conductive material depositions from causing tier deformations and collapses, as the structural framework is already established to support the conductive layers.
2Manufacturing precision
If feature packing densities are increased, then memory capacity is improved, but margins for formation errors decrease leading to tier deformations and collapse
Solution Approach 1:
By segmenting the high-density stack into smaller blocks separated by trenches, the patent reduces the overall height and complexity of each individual block. This makes the tiers within each block more stable and less prone to deformation and collapse, even when feature packing densities are increased to improve memory capacity.
3Length of moving object
If high aspect ratio pillars are formed, then vertical memory array functionality is achieved, but distortion along the height of the pillars occurs
Solution Approach 1:
The patent segments the tall stack structure into multiple shorter blocks separated by trenches. Each block contains pillars with reduced aspect ratios, minimizing distortion along their heights. The vertical memory array functionality is maintained through the stacked arrangement of these blocks, with conductive structures providing electrical connections between tiers across the blocks.
Data Source
AI summary
A method of forming a microelectronic device comprises forming a stack structure over a source structure, forming pillar structures vertically extending through the stack structure, and forming at least one trench vertically extending through the stack structure. The at least one trench defines at least one stadium structure comprising opposing stair step structures having steps comprising horizontal ends of tiers. Additional trenches may be formed to vertically extend through the stack structure, and at least one further trench may be formed to vertically extend through the stack structure. The at least one further trench defines at least one additional stadium structure comprising additional opposing stair step structures having additional steps comprising additional horizontal ends of the tiers. A dielectric material may be formed within the at least one trench, the additional trenches, and the at least one further trench. Microelectronic devices, memory devices, and electronic systems are also described.