Heterogeneous Data Paths for Tiered NVM Systems
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Solution Overview
Problem
Large volatile memory buffers in NVM systems increase the risk of catastrophic data loss due to power interruptions, while larger buffers are needed to improve latency, but they also hinder efficient data management and NVM block utilization.
Innovation Solution
Incorporating a nonvolatile memory buffer between the volatile memory buffer and the NVM to reduce the size of the volatile memory buffer, allowing for data organization and transfer via heterogeneous data paths that minimize data loss and optimize NVM block utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the volatile memory buffer size is increased to improve NVM system latency, then the latency is reduced, but the risk of catastrophic data loss upon power interruption increases
Solution Approach 1:
The memory buffer is segmented into two distinct parts: a volatile memory buffer for fast data reception and a nonvolatile memory buffer for safe data storage. This segmentation allows the system to simultaneously achieve low latency (through the volatile buffer) and high reliability (through the nonvolatile buffer), resolving the contradiction between speed and data safety.
Solution Approach 2:
The nonvolatile memory buffer acts as an intermediary between the volatile memory buffer and the NVM. It receives data from the volatile buffer, maintains it safely during power interruptions, and then transfers it to the NVM. This intermediary component enables the system to use a smaller volatile buffer (reducing latency) while ensuring data safety.
2Loss of time
If the volatile memory buffer size is increased to improve latency, then more data can be transferred directly to NVM, but NVM block utilization becomes inefficient
Solution Approach 1:
The nonvolatile memory buffer performs preliminary data organization and formatting before data is programmed to the NVM. By preparing data in advance in a structured format that matches NVM block requirements, the system achieves efficient block utilization without needing a large volatile buffer, thus maintaining low latency while improving productivity.
Solution Approach 2:
The nonvolatile memory buffer serves as an intermediary that reconciles the different data organization requirements of the volatile buffer and the NVM. It receives data in the volatile buffer's format, reorganizes it according to NVM block structures, and then programs it to the NVM, thereby optimizing block utilization independent of volatile buffer size.
3Reliability
If a smaller volatile memory buffer is used to reduce data loss risk, then reliability improves, but latency benefits are compromised
Solution Approach 1:
By segmenting the buffer into volatile and nonvolatile portions, the system can optimize each for its specific function: the volatile buffer is kept small (reducing data loss risk) while the nonvolatile buffer provides the necessary buffering capacity to maintain low latency performance.
Solution Approach 2:
The system changes the volatility parameter of the buffer by introducing a nonvolatile memory buffer. This parameter change allows the buffer to simultaneously provide the speed characteristics of volatile memory and the data retention characteristics of nonvolatile memory, resolving the trade-off between reliability and latency.
Data Source
AI summary
A nonvolatile memory (“NVM”) buffer is incorporated into an NVM system between a volatile memory buffer and an NVM to decrease the size of the volatile memory buffer and organize data for programming to the NVM. Heterogeneous data paths may be are used for write and read operations such that the nonvolatile memory buffer is used only in certain situations.