Tiered Package Substrates for Multi-Die Stacking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing demand for smaller, more capable semiconductor devices poses a challenge in efficiently packaging multiple semiconductor die within a minimal footprint, as existing technologies struggle to maximize space utilization and integration without compromising electrical connections and protection.
Innovation Solution
The implementation of tiered package substrates with pre-formed recessed or downset flag portions allows for the stacking of multiple die, with encapsulating material protecting the die and wirebonds, and exposed contact pads enabling further integration of circuit devices and sensors within the same footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple semiconductor die are packaged in a single package substrate, then the device density and integration capability increase, but the complexity of electrical connections and packaging structure increases
Solution Approach 1:
The packaging structure is divided into multiple tiered package substrates, each capable of independently mounting semiconductor die. This segmentation allows multiple die to be packaged while maintaining modular complexity management, as each substrate tier can be designed and assembled separately before being integrated into the final multi-tier package.
Solution Approach 2:
The patent transitions from a traditional single-plane packaging approach to a three-dimensional tiered structure. By stacking multiple package substrates vertically at different heights, the system accommodates more semiconductor die within the same footprint area, effectively utilizing the vertical dimension to increase device density without proportionally increasing horizontal space requirements.
2Area of stationary object
If multiple die are stacked on tiered package substrates, then the space utilization and device density increase, but the difficulty of maintaining electrical connections and providing protection increases
Solution Approach 1:
Multiple package substrates are nested vertically in a tiered configuration, with each substrate positioned at a different height level. This nesting arrangement allows electrical connections to be established through vertical interconnections between tiers while maintaining compact packaging. The nested structure enables protective encapsulant material to be applied uniformly across all tiers, ensuring reliable protection and electrical connectivity despite the complex multi-level architecture.
3Ease of manufacture
If traditional single-layer packaging is used, then the packaging process is simpler, but the number of integrated circuits and sensors that can be accommodated in a given space is limited
Solution Approach 1:
Multiple package substrates are prepared and pre-assembled with their respective semiconductor die and wire bonds before being stacked into the final tiered configuration. This preliminary action allows each substrate tier to be manufactured and tested independently using established single-layer packaging processes, maintaining manufacturing simplicity. The pre-assembled tiers are then integrated through vertical stacking, achieving high device integration throughput without requiring complete redesign of the packaging process.
Data Source
AI summary
A packaged semiconductor device includes a first package substrate having a first plurality of lead fingers, a first die attached to a first major surface of the first package substrate, a second package substrate having a second plurality of lead fingers, wherein each of the second plurality of lead fingers extends over the first die and the second package substrate is electrically isolated from the first package substrate. The device also includes a second die attached to a first major surface of the second package substrate, over the first die, and an encapsulant surrounding the first die, the first package substrate, the second die, and the second package substrate, wherein the encapsulant exposes a portion of the first package substrate and a portion of the second package substrate.