Tiered Persistent Memory Allocation for Storage Arrays
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Solution Overview
Problem
Storage arrays face limitations in memory capacity and data durability due to the volatility and high cost of dynamic random-access memory (DRAM), which can lead to data loss during power outages and restrict the inclusion of vast amounts of memory due to physical constraints.
Innovation Solution
The implementation of a tiered memory architecture that extends storage arrays' global memory with storage class memory (SCM), specifically provisioning persistent cache memory regions as expanded global memory, allowing for efficient data management and service of IO operations based on access patterns and service level agreements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If DRAM is used for global memory in storage arrays, then access speed and performance are improved, but memory capacity is limited due to volatility and high cost
Solution Approach 1:
The memory system is segmented into multiple tiers: a first tier comprising volatile memory (DRAM) for high-speed access and a second tier comprising non-volatile memory (SCM) for capacity extension. This segmentation allows the system to leverage the speed advantage of DRAM for frequently accessed data while using SCM for broader capacity, resolving the contradiction between speed and capacity.
Solution Approach 2:
The patent introduces a temporal dimension to memory persistence by using SCM that maintains data without continuous power supply. This adds a persistence dimension to the traditional volatile memory model, enabling the system to achieve both speed (from volatile memory) and capacity (from non-volatile memory) by operating across different memory dimensions.
2Speed
If DRAM is used for global memory, then performance characteristics are improved, but data durability is reduced due to volatility during power outages
Solution Approach 1:
The memory architecture segments data storage into two functional groups: volatile memory for performance-critical operations and non-volatile SCM for durability. This segmentation ensures that performance and durability requirements are met by different memory components, with SCM providing persistence during power outages while DRAM maintaining high-speed access for active data.
Solution Approach 2:
The system changes the persistence parameter of memory by incorporating SCM, which maintains data without continuous power supply. This parameter change from volatile to non-volatile storage enables data durability during power outages while preserving the performance characteristics needed for active data processing through the tiered architecture.
3Speed
If DRAM is used for global memory, then access performance is improved, but cost increases due to high cost per GB
Solution Approach 1:
The memory system segments the memory market into two segments: high-performance volatile memory for critical operations and cost-effective non-volatile SCM for capacity. This segmentation allows the system to achieve optimal performance for frequently accessed data while reducing overall cost by using cheaper SCM for broader capacity requirements.
Solution Approach 2:
The patent changes the cost parameter by introducing SCM, which offers lower cost per GB compared to DRAM. This parameter change enables the system to achieve both acceptable performance and reduced cost by leveraging the different characteristics of the two memory types in a tiered architecture.
4Quantity of substance
If physical memory capacity is increased in storage arrays, then memory capacity is improved, but device complexity increases due to physical constraints
Solution Approach 1:
The memory architecture segments capacity requirements across two memory tiers, allowing the system to achieve high memory capacity without proportionally increasing physical complexity. The non-volatile SCM provides capacity extension with simpler physical implementation compared to expanding volatile memory, as it does not require the same power delivery and cooling infrastructure.
Data Source
AI summary
The present disclosure relates to one or more memory management techniques. In embodiments, one or more regions of storage class memory (SCM) of a storage array is provisioned as expanded global memory. The one or more regions can correspond to SCM persistent cache memory regions. The storage array's global memory and expanded global memory can be used to execute one or more storage-related services connected to servicing (e.g., executing) an input/output (IO) operation.