Tiered Register Allocation Compiler Optimization
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Solution Overview
Problem
In data processor register allocation for tiered architectures, existing methods either fail to generate optimal object code due to inefficient register usage, leading to increased program memory size and execution time, as they either restrict register access too much or not enough, resulting in suboptimal instruction forms and unnecessary memory accesses.
Innovation Solution
The solution forces inputs and outputs to belong to the most restrictive register subset initially, while making more registers available for high-pressure inputs/outputs, only sending data to memory if all registers cannot be allocated within the restricted set, thus optimizing register allocation by avoiding memory spills.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If registers are restricted to the most restricted subset for multi-version instructions, then instructions resolve to efficient forms, but registers become unavailable forcing spills to memory
Solution Approach 1:
The patent applies dynamics by making the register set restriction flexible rather than fixed. The compiler dynamically determines whether to enforce the restricted register set based on register pressure conditions. When register pressure is low, the restricted set is enforced to generate efficient instruction forms. When register pressure is high, the restriction is relaxed to make more registers available, preventing spills to memory. This dynamic adaptation resolves the contradiction between instruction efficiency and register availability.
Solution Approach 2:
The patent changes the parameter of register set restriction from a static constraint to a conditional parameter. The restriction level is adjusted based on compiler analysis of register pressure. By changing this parameter dynamically, the system can switch between enforcing strict register set limitations (for efficiency) and relaxing them (for availability), thereby resolving the contradiction between these two opposing requirements.
2Quantity of substance
If all multi-version instructions use the least restrictive data register form, then register availability increases, but instruction efficiency decreases
Solution Approach 1:
The patent makes the register allocation strategy dynamic by evaluating register pressure for each multi-version instruction. Instead of uniformly using the least restrictive register form, the compiler dynamically selects between restricted and unrestricted allocation based on current register availability. This dynamic decision-making process resolves the contradiction by adapting to actual runtime conditions.
Solution Approach 2:
The patent applies local quality by allowing different register allocation strategies for different instructions based on local conditions. Each multi-version instruction can have its register allocation independently optimized - some instructions use restricted register sets for efficiency while others use the full register set for availability, depending on local register pressure conditions. This localized optimization resolves the contradiction at the instruction level.
3Quantity of substance
If registers are spilled to memory due to unavailability, then register pressure is relieved, but program memory size and execution time increase
Solution Approach 1:
The patent applies preliminary action by performing register allocation with relaxed constraints before finalizing instruction generation. The compiler first determines register assignments assuming broader availability, then validates these assignments against actual hardware constraints. This preliminary allocation prevents register pressure buildup that would force spills to memory, thereby avoiding the time loss associated with memory accesses.
Solution Approach 2:
The patent introduces an intermediary analysis phase between instruction selection and final code generation. This intermediary phase analyzes register pressure and adjusts allocation strategies accordingly, acting as a mediator that prevents the need for memory spills. By inserting this intermediary step, the system can resolve register conflicts before they lead to inefficient memory accesses.
Data Source
AI summary
A method of register allocation in complier using a computer instruction set having tiered instructions that accesses differing numbers of registers makes a first preliminary register allocation attempt using an initially specified register set for each instruction. If this fails, the method identifies instructions having an initially specified limited register having a variable not register allocatable. The method makes a second preliminary register allocation attempt except using a less restrictive register set for the identified instructions. This method employs a next less restrictive register set and re-attempts preliminary register allocations for instructions with more than two levels of register restriction.