TigerSharc DSP Boot Management Chip Pipeline Writing
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Solution Overview
Problem
The conventional Host boot mode for TigerSharc DSP chips is prone to errors and is time-consuming, especially for long boot codes, due to strict writing sequences and dependencies on acknowledgement, bus lock, and bus grant signals, which can lead to instability and slow boot times.
Innovation Solution
A TigerSharc DSP boot management chip with a two-port RAM unit, management unit, and DSP download management unit, featuring a watchdog circuit and supporting multiple boot modes via NOR flash or external bus, utilizing a pipeline writing mechanism to enhance boot speed and stability, and allowing boot program storage in NOR flash for faster re-download.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the conventional Host boot mode writes each Word sequentially with waiting for DSP response, then the boot stability is ensured, but the boot time becomes excessively long
Solution Approach 1:
The patent applies preliminary action by pre-writing the boot code into the AUTODMA port before the actual boot process begins. The host writes the complete boot code in advance, and the DSP automatically executes it without requiring continuous host intervention during boot, thus reducing boot time while maintaining stability
Solution Approach 2:
The patent implements continuity of useful action by enabling the AUTODMA port to continuously transfer boot code from external storage to the DSP execution memory without interruption. The boot process becomes a continuous automatic operation rather than a series of interrupted sequential writes, significantly reducing total boot time
2Manufacturing precision
If the host controls the bus tightly with multiple signal dependencies (ACK, BUSLOCK, HBG), then the data writing accuracy is ensured, but the boot process becomes error-prone and complex
Solution Approach 1:
The patent extracts the complex bus control logic (ACK, BUSLOCK, HBG signal coordination) from the host boot process and transfers it to the AUTODMA port's automatic control mechanism. The AUTODMA port independently manages these control signals, simplifying the host's role to just initiating the boot process while maintaining precise data writing through the port's built-in control logic
Solution Approach 2:
The AUTODMA port performs self-service by automatically managing the boot code transfer process without continuous host intervention. It autonomously handles bus arbitration, data transfer timing, and control signal coordination, reducing the overall system complexity while ensuring accurate data writing through its dedicated control mechanisms
3Speed
If the writing speed is increased without waiting for DSP response, then the boot speed improves, but the chip may fail to boot due to processing bottlenecks
Solution Approach 1:
The patent applies preliminary action by completing the entire boot code transfer to the AUTODMA port before the DSP begins execution. The host writes all boot code words in advance at high speed, and the DSP simply executes the pre-loaded code without requiring real-time writing during execution, thus achieving both high writing speed and high boot success rate
Solution Approach 2:
The patent segments the boot process into two distinct phases: a high-speed pre-writing phase where the host transfers complete boot code to the AUTODMA port, and an execution phase where the DSP automatically runs the pre-loaded code. This segmentation allows the writing phase to operate at maximum speed without worrying about DSP processing bottlenecks during execution
Data Source
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Figure 3
AI summary
A TigerSharc DSP boot management chip and the method thereof, the boot management chip comprises an interface unit, a two-port RAM unit, a management unit and a DSP download management unit; further comprises a flash drive unit and a NOR flash chip; the management unit is connected to the flash drive unit; the two-port RAM unit is connected to the NOR flash chip via the flash drive unit; and, the NOR flash chip is communicated with the DSP download management unit via the flash drive unit. The management unit provides two booting modes: booting via the NOR flash chip or booting via an external bus; the host boot startup method is improved and two booting program download methods are provides, which can greatly improve the booting speed of the TigerSharc DSP chip.