Two-Stage Tile-Based Image Scaling Using SIMD Vectorization

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Solution Overview

Problem

Existing image scaling methods face computational bottlenecks, especially in real-time applications, due to the limitations of traditional hardware-based solutions, which are no longer necessary with advancements in microprocessor speeds, necessitating software-based solutions for efficient image scaling.

Innovation Solution

A two-stage tile-based image scaling method utilizing multi-threading and SIMD intrinsics, where images are partitioned into tiles, scaled in the slow scan direction, transposed, scaled in the fast scan direction, and then transposed back to their original orientation, leveraging the capabilities of modern multi-core processors for accelerated processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional hardware-based image scaling is used, then processing speed is sufficient for real-time applications, but device complexity and cost increase

Engineering Contradiction:
Improveimage scaling processing speedVSAvoidhardware complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent replaces hardware-based image scaling mechanisms with software-based processing using modern multi-core microprocessors. The invention uses parallel processing algorithms and SIMD intrinsics to achieve hardware-level performance through software, eliminating the need for dedicated hardware scaling circuits while maintaining real-time processing capability

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent divides the image into multiple tiles that can be processed independently and in parallel across multiple CPU cores. This segmentation enables the software solution to utilize multi-core architecture effectively, achieving high processing speeds without requiring complex hardware while reducing device complexity compared to traditional hardware-based approaches

Inventive Principle:
Principle #1Segmentation

2Device complexity

If software-based image scaling is implemented, then device complexity is reduced, but processing speed may be insufficient for real-time applications

Engineering Contradiction:
Improvesystem complexityVSAvoidimage scaling throughput
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The image is divided into multiple independent tiles that can be processed simultaneously by different CPU cores. This tile-based approach enables parallel processing, significantly increasing throughput while keeping the software implementation simple and compatible with standard multi-core processors

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary calculations of scaling parameters and prepares processing data structures before actual scaling operations. This pre-computation optimizes the main processing loop, enabling the software to achieve high speeds by minimizing runtime calculations and maximizing instruction cache efficiency

Inventive Principle:
Principle #10Preliminary action

Solution Approach 3:

The patent utilizes SIMD intrinsics and vectorization to change how processing operations are executed at the instruction level. By transforming scalar operations into vector operations, the software achieves parallel processing at the instruction level, dramatically increasing throughput while maintaining software-based simplicity

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If image scaling is performed in a single stage, then processing is simpler, but processing speed and throughput are limited

Engineering Contradiction:
Improveprocessing architecture complexityVSAvoidimage scaling throughput
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The scaling operation is divided into two distinct stages: first scaling in the horizontal direction, then scaling in the vertical direction. This two-stage approach allows each stage to be optimized independently and processed in parallel across tiles, significantly increasing overall throughput while maintaining manageable architectural complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transforms the two-dimensional scaling problem into two separate one-dimensional scaling problems. By decomposing the 2D scaling into sequential 1D scaling operations (horizontal then vertical), the system achieves higher throughput through better cache utilization and parallel processing opportunities while keeping each individual stage relatively simple

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9679356B2Vectorized two stage tile-based scaling
Publication Date: 2017.06.13 GENESEE VALLEY INNOVATIONS LLC
  • US9679356B2 patent drawing
  • US9679356B2 patent drawing
  • US9679356B2 patent drawing

AI summary

Image scaling disclosed herein comprises receiving an image from an image capturing device and partitioning an image into at least one image tile using a partitioning module. A determination is made if the image tile requires slow scan scaling and/or fast scan scaling. The image tile is subject to slow scan scaling. The image tile is then transposed, scaled in the fast scan direction, and then again transposed to an original orientation. The tile is reassembled into a scaled image and may be rendered by a rendering device.