Tile-Based Image Stitching and Encoding Pipeline
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Solution Overview
Problem
Existing image processing techniques for 360-degree scenes in VR and AR applications face inefficiencies due to separate stitching and encoding processes, leading to increased latency and memory usage, as they require copying and converting images between different hardware components, which hampers parallel processing and alignment of tile generations.
Innovation Solution
The proposed solution involves generating tiles that are compatible with both stitching and encoding processes, allowing for external tile generation and reuse of memory blocks, enabling parallel processing across multiple cores by aligning the stitching and encoding processes on the same tile divisions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate stitching and encoding processes are used, then each process can be independently optimized, but latency and memory usage increase due to copying and converting images between hardware components
Solution Approach 1:
The patent combines the stitching and encoding processes into a unified pipeline where tile divisions are aligned between both processes. This allows the stitched image to be directly divided into tiles that are immediately ready for encoding, eliminating the need for separate copying and conversion operations between independent processes.
Solution Approach 2:
The patent segments the image processing into aligned tile divisions that are consistent across both stitching and encoding stages. By pre-defining tile boundaries in the stitching process that match the encoding requirements, the system avoids redundant operations while maintaining independent optimization capabilities for each stage.
2Productivity
If images are copied and converted between hardware components, then processing can be distributed, but memory usage increases and parallel processing is hampered
Solution Approach 1:
The patent performs preliminary tile division during the stitching process itself, creating tile structures that are immediately compatible with encoding requirements. This preliminary action eliminates the need for subsequent copying and conversion operations, reducing memory usage while maintaining distributed processing capabilities across multiple hardware components.
3Ease of manufacture
If tile generations are not aligned between stitching and encoding, then each process can use optimal tile divisions, but parallel processing efficiency decreases
Solution Approach 1:
The patent implements universal tile divisions that serve both stitching and encoding processes simultaneously. By defining tile boundaries that satisfy both stitching requirements and encoding requirements, the system enables parallel processing across multiple cores while maintaining the flexibility to optimize for different processing stages through parameter configuration rather than structural changes.
Data Source
AI summary
Methods and apparatus for tile-based stitching and encoding of images are disclosed. An example apparatus to stitch and encode images includes tile generation circuitry to generate first input tiles from a first image and second input tiles from a second image, the first image from a first camera and the second image from a second camera. The example apparatus also includes stitching circuitry to process the first input tiles and the second input tiles to convert the first input tiles into corresponding first stitched tiles and to convert the second input tiles into corresponding second stitched tiles. The example apparatus further includes encoding circuitry to encode the first stitched tiles and the second stitched tiles in parallel, wherein the tile generation circuitry is to generate the first input tiles and the second input tiles based on division information associated with the encoding circuitry.