Tile Binning Apparatus for 3D Rendering Power Optimization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In 3D rendering for mobile multimedia devices, the high power consumption due to memory reading operations is a concern, particularly when determining the overlap between 3D triangles and tiles on a 2D plane, as existing methods lack a criterion to determine whether to reduce the overlap factor, leading to unnecessary operations.
Innovation Solution
A tile binning apparatus and method that includes a determination unit to identify abnormal edges in triangles, an overlap test unit to perform edge-specific overlap tests, and a bin array update unit to optimize power usage by sorting vertices and updating the bin array based on overlap test results, thereby reducing unnecessary operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If an overlap test is performed for each triangle edge to reduce memory reading operations, then power consumption is reduced, but device complexity increases due to additional determination units and sorting operations
Solution Approach 1:
The patent divides the triangle into three separate edges and performs overlap tests independently for each edge. The determination unit processes each edge individually, and the overlap test unit executes separate tests for edges with normal vectors having positive or negative Y-components. This segmentation allows the system to identify and process only the relevant edges that contribute to tile overlap, reducing unnecessary computations and power consumption while maintaining manageable complexity through modular processing.
Solution Approach 2:
The patent applies different processing strategies to different edges based on their local characteristics. The determination unit checks the normal vector of each edge, and the overlap test unit performs tests only on edges where the Y-component of the normal vector is positive or negative, depending on the tile position. This local quality approach ensures that computational resources are allocated only where necessary, optimizing power efficiency without requiring uniform complex processing across all edges.
2Loss of energy
If the overlap factor is reduced by performing additional operations, then memory reading operations decrease, but productivity decreases due to additional processing steps
Solution Approach 1:
The patent performs overlap tests only on the necessary edges of each triangle rather than all edges uniformly. The determination unit identifies edges that require testing based on normal vector orientation, and the overlap test unit executes tests only on those specific edges. This partial action approach reduces the total number of overlap tests compared to processing all edges, thereby reducing memory reading operations and power consumption while minimizing the impact on processing speed through selective rather than comprehensive testing.
Data Source
AI summary
An apparatus and method for tile binning are provided. The tile binning apparatus may include a determination unit to determine whether a triangle obtained as a result of geometric processing includes an abnormal edge, an overlap test unit to perform an overlap test with respect to each edge of the triangle when the abnormal edge is absent from the triangle, and to sort three vertices of the triangle according to Y-axis values and perform the overlap test with respect to each edge of the triangle based on a sorting result when the triangle includes the abnormal edge, and a bin array update unit to update a bin array based on an overlap test result.