Image Processor Tile Boundary Compression Circuit
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Solution Overview
Problem
Existing image processors face inefficiencies in image processing due to high bandwidth consumption between the processor and external memory, particularly when handling large images, and require additional circuitry to manage tile boundaries during compression.
Innovation Solution
The image processing system divides images into tiles and employs a determination circuit to assess whether tile boundaries are within compression units, allowing for selective compression and the use of dummy data to optimize memory storage without increasing circuit size, thereby reducing bandwidth consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If compression is performed on image blocks containing tile boundaries, then compression efficiency is improved, but additional holding circuits are required to store intermediate results until all tiles are processed
Solution Approach 1:
The image processing system divides the image into multiple tiles that can be processed independently and in parallel. Each tile is processed separately through the compression pipeline, allowing compression to begin on early tiles without waiting for subsequent tiles to be fully processed. This segmentation eliminates the need for holding circuits while maintaining compression efficiency.
Solution Approach 2:
The system performs preliminary actions by starting compression on image blocks before all tiles containing those blocks are fully processed. The determination circuit identifies which tiles have been completely processed and which are still being processed, allowing compression to proceed preliminarily on blocks where sufficient data is available, rather than waiting for all tiles to complete.
2Manufacturing precision
If large-volume images are processed, then image quality is maintained, but bandwidth consumption between processor and external memory increases considerably
Solution Approach 1:
The image is divided into multiple tiles that are processed independently. This segmentation allows the system to process and compress smaller portions of the image concurrently, reducing the amount of data that needs to be transferred between external memory and the processor at any given time, thereby reducing bandwidth consumption while maintaining overall image quality.
Solution Approach 2:
The determination circuit applies local quality assessment by evaluating tile boundary conditions for each image block individually. This allows the system to make locally optimized decisions about when to compress each block, ensuring that compression occurs as soon as sufficient data is available in each local region, rather than waiting for global completion conditions.
Data Source
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AI summary
The present invention provides a semiconductor device enabling efficient compression without increasing the circuit size and a processing method using the semiconductor device. According to an embodiment, an image processor includes: a coding circuit to perform image processing on a target image divided into a plurality of tiles, the image processing being performed on each of the tiles; a determination circuit to determine whether a tile boundary is included in the area of an image block serving as a unit of compression of the target image; and a compression circuit to compress the image block image-processed by the coding circuit, according to a determination result of the determination circuit.