Tile Coalescer for API Order Preservation in Programmable Blending
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Solution Overview
Problem
Conventional graphics processing pipelines lack the ability to perform programmable blending operations while maintaining application programming interface (API) order, as they rely on fixed-function hardware units that are limited in functionality and cannot be programmed like pixel shaders.
Innovation Solution
A graphics subsystem is configured to generate tiles of coverage samples, using a bin to collect and a tile engine to compare and insert coverage samples, allowing programmable blending operations to be performed while maintaining API order by ensuring atomicity and order preservation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional ROPs are used for blending operations, then API order is maintained, but programmable operations cannot be performed
Solution Approach 1:
The patent segments the blending operation into two distinct phases: (1) a rasterization phase that generates coverage data and maintains API order, and (2) a programmable blending phase that performs complex operations. This segmentation allows each phase to specialize - the first ensures ordering while the second provides programmability, resolving the contradiction between maintaining API order and enabling programmable operations
Solution Approach 2:
The patent introduces an intermediary data structure (coverage data array) that acts as a mediator between the rasterization stage and the blending stage. This intermediary preserves the API order information generated during rasterization while allowing the programmable shader to access and process this ordered data, thus enabling both API order maintenance and programmable operations
2Adaptability or versatility
If fixed-function blending hardware is used, then blending operations can be performed, but functionality is limited
Solution Approach 1:
The patent makes the blending hardware universal by allowing a single programmable shader unit to perform multiple different blending operations through software configuration rather than requiring dedicated fixed-function hardware for each operation type. The shader can be programmed to implement various blending modes (additive, subtractive, alpha blending, etc.), providing unlimited functionality without increasing physical hardware complexity
Solution Approach 2:
The patent replaces fixed mechanical blending hardware with a software-based programmable shader system. Instead of having dedicated circuitry for each blending operation, the system uses programmable instructions that can be loaded and executed, substituting rigid hardware mechanisms with flexible software control that achieves the same functional goals with greater adaptability
3Adaptability or versatility
If pixel shaders perform blending operations, then programmable operations are enabled, but API order is not maintained
Solution Approach 1:
The patent performs preliminary action by completing the rasterization phase and generating the coverage data array with API order preserved before the programmable blending phase begins. This preliminary completion of ordering tasks ensures that when the programmable shader subsequently processes the data, the API order is already established and can be maintained throughout the blending operations
Data Source
AI summary
A tile coalescer within a graphics processing pipeline coalesces coverage data into tiles. The coverage data indicates, for a set of XY positions, whether a graphics primitive covers those XY positions. The tile indicates, for a larger set of XY positions, whether one or more graphics primitives cover those XY positions. The tile coalescer includes coverage data in the tile only once for each XY position, thereby allowing the API ordering of the graphics primitives covering each XY position to be preserved. The tile is then distributed to a set of streaming multiprocessors for shading and blending operations. The different streaming multiprocessors execute thread groups to process the tile. In doing so, those thread groups may perform read-modify-write operations with data stored in memory. Each such thread group is scheduled to execute via atomic operations, and according to the API order of the associated graphics primitives.