Time Deterministic Data Exchange for Parallel Tile Synchronization
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Solution Overview
Problem
In parallel computing with multiple tiles, existing technologies face challenges in synchronizing workloads effectively across tiles, particularly in bulk synchronous parallel (BSP) computing protocols, where dependencies between program fragments executed on different tiles lead to inefficiencies in compute and exchange phases.
Innovation Solution
A computer program with instructions for a processing unit that includes a send function for transmitting data packets without destination identifiers, a switch control function for connecting wires to a switching fabric at predetermined times, and merge instructions to combine functions for efficient data transmission and reception, ensuring time deterministic data exchange between tiles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If barrier synchronization is implemented in BSP protocol to ensure all tiles complete compute phase before exchange phase, then data dependency consistency is improved, but processing time and productivity are reduced due to waiting for slowest tile
Solution Approach 1:
The patent applies preliminary action by having tiles pre-synchronize their internal states and prepare data for exchange before the formal barrier synchronization point. This allows tiles to be ready to proceed immediately when the barrier is reached, minimizing the waiting time that reduces productivity while maintaining data dependency consistency.
2Productivity
If tiles execute program fragments concurrently on different tiles with local memory, then processing speed is improved, but synchronization complexity and difficulty of detecting and measuring increase
Solution Approach 1:
The patent introduces intermediary synchronization mechanisms including barrier synchronization points and exchange phase coordination protocols that mediate between concurrent tile executions. These intermediaries provide structured checkpoints where synchronization state can be detected and measured without requiring continuous complex tracking throughout the entire computation, thus reducing the difficulty of detecting and measuring synchronization while maintaining parallel processing speed.
3Productivity
If data packets are transmitted without destination identifiers using predetermined transmit times, then transmission efficiency is improved, but timing precision requirements and device complexity increase
Solution Approach 1:
The patent applies preliminary action by pre-configuring the switching fabric with connection routing information before data transmission begins. This allows data packets to be transmitted without destination identifiers during the exchange phase, as the switching fabric already knows the predetermined connections. This approach improves transmission efficiency while managing device complexity by performing the complex routing setup in advance rather than requiring real-time destination identification during transmission.
Data Source
AI summary
The invention relates to a computer program comprising a sequence of instructions for execution on a processing unit having instruction storage for holding the computer program, an execution unit for executing the computer program and data storage for holding data, the computer program comprising one or more computer executable instruction which, when executed, implements: a send function which causes a data packet destined for a recipient processing unit to be transmitted on a set of connection wires connected to the processing unit, the data packet having no destination identifier but being transmitted at a predetermined transmit time; and a switch control function which causes the processing unit to control switching circuitry to connect a set of connection wires of the processing unit to a switching fabric to receive a data packet at a predetermined receive time.