Tiled Display Voltage Routing for Narrow Bezels and Low Resistance
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Solution Overview
Problem
Large-sized display devices face increased defect rates due to the number of pixels, affecting productivity and reliability, and tiled display devices have a sense of disconnection due to boundary portions between connected display devices.
Innovation Solution
A display device and tiled display device configuration that minimizes non-display areas by reducing the width of voltage lines in the thin film transistor layer, and uses a bonding member to connect display devices, preventing recognition of boundary portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If display devices are connected in a tiled configuration to achieve large screen size, then the defect rate decreases and productivity improves, but boundary portions between display devices create a sense of disconnection
Solution Approach 1:
The patent extracts and removes the non-display area (boundary portion) from the visible display region by positioning voltage lines outside the display area. This extraction eliminates the visual discontinuity caused by boundary portions while maintaining the tiled configuration for large screen implementation.
Solution Approach 2:
The patent moves voltage lines from the display area to the non-display area, effectively changing their spatial dimension. By relocating these essential electrical components to an external dimension (non-display area), the display surface appears continuous without visible boundaries.
2Area of stationary object
If voltage line width is reduced to minimize non-display area, then the sense of immersion improves, but the resistance of voltage lines increases
Solution Approach 1:
The patent extends voltage lines into the non-display area, utilizing the third spatial dimension (width of the substrate) to route electrical connections. This dimensional extension allows voltage lines to have sufficient cross-sectional area for low resistance while keeping the display area maximized.
Solution Approach 2:
The non-display area serves as an intermediary space that mediates between the conflicting requirements of minimal area and sufficient electrical conductivity. By placing voltage lines in this intermediary zone, both display area maximization and electrical performance are achieved.
3Area of stationary object
If voltage lines are disposed in the non-display area, then the display area is maximized, but the complexity of electrical connection increases
Solution Approach 1:
The patent merges the voltage line structure with the substrate edge configuration, integrating electrical connections into the overall device architecture. By combining the voltage line routing with the non-display area boundary, the design simplifies the overall structure despite the extended routing path.
Data Source
AI summary
A display device includes a first substrate including a display area and a non-display area adjacent to the display area, a first voltage line disposed on the first substrate and supplying a first voltage, a second substrate disposed on the first voltage line, and a thin film transistor layer disposed on the second substrate and comprising a plurality of thin film transistors and a second voltage line disposed in the non-display area and electrically connected to the first voltage line through a first contact hole penetrating the second substrate.