Tiled Display Seam Reduction via Gate Driver Integration
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Solution Overview
Problem
Large-size display devices with many pixels suffer from increased defect rates and reduced productivity due to visible seams between tiled display devices, which detract from the viewer's immersion in the image.
Innovation Solution
A display device design where a power line is coupled with a gate input line within the display area to prevent voltage ripples, and a tiled display configuration that reduces the non-display area between devices, allowing seamless image presentation by canceling out voltage ripples and minimizing recognizable seams.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a tiled display configuration is used to create large-size displays, then the defect rate and productivity issues are reduced, but visible seams appear between display devices
Solution Approach 1:
The harmful non-display areas (bezel areas) between display devices are extracted and minimized by extending the display area into what would traditionally be the bezel region. This is achieved by placing gate drivers and other circuitry within the display area rather than in separate non-display areas, thereby reducing the visible seams between tiled display devices.
Solution Approach 2:
The display area and non-display area are merged by extending the display region into the bezel area. The gate drivers and other control circuits are integrated within the display area, combining functions that were previously separated into distinct regions, thereby eliminating the visual discontinuity between adjacent display devices.
2Reliability
If gate drivers are placed in non-display areas, then circuit protection is improved, but the non-display area size increases creating visible seams
Solution Approach 1:
The gate drivers are moved from the traditional non-display area (bezel region) into the display area by utilizing the extended display region. This spatial repositioning allows the circuitry to be protected while minimizing the visible non-display areas between tiled devices, as the drivers are now located within the active display region rather than in the external bezel area.
Solution Approach 2:
The display area is effectively extended into the bezel region, creating a virtual expansion of the active display area. This allows the gate drivers to be positioned in what would traditionally be considered non-display space, but is now functionally integrated into the display area, thereby reducing visible seams while maintaining circuit protection.
3Device complexity
If power lines are not coupled with gate input lines, then layout simplicity is maintained, but voltage ripples occur affecting display quality
Solution Approach 1:
The power lines are coupled with the gate input lines to preemptively counteract voltage ripples before they can affect display quality. By establishing this coupling in advance during the layout design phase, the patent prevents voltage instability issues from occurring during operation, thereby maintaining both layout simplicity and voltage stability.
Data Source
AI summary
A display device includes a display area including a pixel, a non-display area around the display area, and a display driver electrically connected to the non-display area. The display area includes a data line extending in a first direction and configured to supply data voltage received from the display driver to the pixel, a power line at one side of the pixel and extending in the first direction to supply a supply voltage received from the display driver to the pixel, a gate input line electrically connected to the display driver and extending in the first direction, the gate input line including a scan clock line and a scan clock bar line, and a gate driver connected to the gate input line and configured to receive a gate input signal from the gate input line. The scan clock line and the scan clock bar line cross at least once.