Tiled Display Pixel Layout for Gate Driver Integration and Uniform Pitch

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Solution Overview

Problem

Existing tiled display devices face challenges in minimizing non-display areas and maintaining uniform pixel pitches, leading to irregularities in pixel circuit disposition and potential user perception of device disconnection.

Innovation Solution

The display device design includes widened distances between certain pixel circuits with stages of the gate driver disposed between them, and adjusts pixel and light emitting element positions to minimize non-display areas and maintain uniform pixel pitches, incorporating demux, fan-out, and electrostatic discharge areas within the display area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If gate driver stages are disposed between pixel circuits, then gate signal provision is improved, but distance between pixel circuits increases leading to irregular disposition

Engineering Contradiction:
Improvegate signal provisionVSAvoidpixel circuit disposition uniformity
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent applies local quality by making pixel circuits adjacent to gate driver stages have different distances from their neighbors compared to other pixel circuits. Specifically, pixel circuits adjacent to stages have larger distances to accommodate the stage structures, while other pixel circuits maintain smaller, more uniform distances. This localized variation in spacing resolves the contradiction by allowing gate driver stages to be integrated without compromising overall manufacturing precision.

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If non-display areas are minimized, then display area efficiency is improved, but coupling areas between tiled devices become visible

Engineering Contradiction:
Improvedisplay area efficiencyVSAvoidvisible coupling areas
Core Design Contradiction:
Area of stationary objectVSShape

Solution Approach 1:

The patent applies parameter changes by carefully controlling and adjusting the distance between adjacent display devices in tiled configurations. By optimizing this distance parameter, the patent achieves a balance where non-display areas are minimized for better display efficiency, while the spacing between tiles is sufficient to prevent visible coupling areas, thus resolving the contradiction between these two requirements.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If pixel circuits are spaced irregularly, then gate driver integration is improved, but auto optical inspection reliability decreases

Engineering Contradiction:
Improvegate driver integrationVSAvoidauto optical inspection reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies local quality by creating a systematic pattern of distance variations rather than random irregularities. Pixel circuits adjacent to gate driver stages have larger distances, while other circuits maintain smaller distances. This structured approach allows effective gate driver integration while maintaining sufficient regularity for reliable auto optical inspection, as the inspection system can account for these predictable, localized variations.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12376438B2Display device and tiled display device including the same
Publication Date: 2025.07.29 SAMSUNG DISPLAY CO LTD
  • US12376438B2 patent drawing
  • US12376438B2 patent drawing
  • US12376438B2 patent drawing

AI summary

A display device includes a display area including light emitting elements in a first pixel row, pixel circuits in a first circuit row and electrically connected to the first pixel row, light emitting elements in a second pixel row between the first pixel row and the first circuit row, pixel circuits in a second circuit row and electrically connected to the second pixel row, and a gate driver including a first stage disposed between the pixel circuits of the first circuit row and a second stage disposed between the pixel circuits of the second circuit row. A distance between adjacent pixel circuits with the first stage between the adjacent pixel circuits in the first circuit row is greater than a distance between other pixel circuits of the first circuit row.