Tiled Display Panel Layout for Seamless Pixel Spacing
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Solution Overview
Problem
In tiled display devices, the increased distance between adjacent pixels due to connection areas results in visually recognizable seams, affecting display quality.
Innovation Solution
The display panel design includes sub-display panels connected by a connection member, where certain pixels share power voltage lines, eliminating the need for separate low power voltage lines in some pixels, and utilizing connection pads and members to maintain consistent pixel spacing, thereby minimizing visible seams.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If connection members are used to couple display panels, then electrical connection between panels is achieved, but distance between adjacent pixels increases causing visible seams
Solution Approach 1:
The patent combines the connection member with the low power voltage line structure, making them integrated rather than separate components. The connection member serves dual purposes: providing electrical connection between panels and maintaining pixel spacing alignment, thereby eliminating the need for additional separate connection structures that would increase pixel distance and create visible seams.
2Reliability
If separate low power voltage lines are provided for each pixel, then power supply reliability is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The low power voltage line is designed to serve multiple pixels simultaneously rather than being dedicated to a single pixel. This multi-functional approach reduces the total number of voltage lines required, simplifying the overall structure while maintaining reliable power supply to all connected pixels through the shared line and connection member infrastructure.
Data Source
AI summary
A display panel includes a first sub-display panel, a second sub-display panel adjacent to the first sub-display panel in a first direction, and a connection member electrically connecting the first sub-display panel to the second sub-display panel. The first sub-display panel includes a first pixel, a second pixel between and adjacent to the first pixel and the second sub-display panel, a first low power voltage line for transferring a power voltage to the first pixel, and a first gate line electrically connected to the first pixel and the second pixel, the second pixel receives the power voltage from the first low power voltage line, the second sub-display panel includes a third pixel adjacent to the first sub-display panel, and the third pixel is electrically connected to the first gate line.