Tiled Display Data Driving Circuit With Shared Data Pins
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Solution Overview
Problem
The increasing demand for high display resolution in electronic devices leads to a need for more data pins in the data driving circuit, which can result in reduced yield and increased manufacturing costs due to minimum width limitations of data pins, prompting the need for a method to reduce the number of data pins while maintaining performance.
Innovation Solution
The implementation of a data driving circuit that simultaneously provides data signals to multiple semiconductor units on multiple substrates, reducing the number of data pins required by sharing data channels across substrates, thereby maintaining functionality with fewer pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the quantity of pixels per unit area is increased to meet high display resolution demand, then the display resolution is improved, but the number of data pins required increases
Solution Approach 1:
The display panel is divided into multiple substrates (first substrate and second substrate), each with its own semiconductor units. The data driving circuit is segmented to provide data signals to multiple substrates through shared data pins, allowing high resolution to be achieved across multiple segments rather than requiring proportionally more pins for a single large substrate.
Solution Approach 2:
The data driving circuit is designed with multi-functionality to simultaneously provide data signals to multiple substrates through the same data pins. Each data pin serves multiple substrates and multiple semiconductor units across these substrates, reducing the total number of data pins needed while maintaining high display resolution.
2Measurement precision
If the number of data pins is increased to support high display resolution, then the display resolution is improved, but the width of data pins must be reduced which decreases manufacturing yield
Solution Approach 1:
Multiple data signal paths are merged into shared data pins. The data driving circuit combines the function of driving multiple substrates through common data pins, allowing the pin width to maintain the minimum manufacturing width while still supporting high display resolution through time-multiplexed or parallel signal distribution.
Solution Approach 2:
Each data pin is designed to serve multiple substrates and multiple semiconductor units, performing multiple functions that would traditionally require separate dedicated pins. This universality allows the pin width to remain at manufacturable dimensions while achieving high resolution through efficient resource sharing.
3Measurement precision
If the quantity of data driving circuits or layout area is increased to meet high display resolution requirements, then the display resolution is improved, but the manufacturing cost increases
Solution Approach 1:
The data driving circuit is designed with universal functionality to drive multiple substrates simultaneously through shared data pins. This multi-functional design reduces the total number of data pins and driving circuit instances needed, thereby reducing manufacturing cost while achieving high display resolution across the tiled substrate arrangement.
Solution Approach 2:
The display system is segmented into multiple substrates that can be manufactured separately and then tiled together. The data driving circuit is designed to address these segmented substrates efficiently, allowing each substrate to be driven with a portion of the total data signal capacity, reducing the overall complexity and cost compared to a single large substrate requiring proportionally more pins.
Data Source
AI summary
A tiling device with a driving method having a low number of data pins is provided. The tiling device includes a first substrate, a second substrate and a data driving circuit. The first substrate includes a plurality of first semiconductor units. The second substrate includes a plurality of second semiconductor units. The data driving circuit simultaneously provides first data signals to the plurality of first semiconductor units and the plurality of second semiconductor units, and simultaneously provides second data signals to the plurality of first semiconductor units and the plurality of second semiconductor units.