Tiled MicroLED Display Architecture for Higher Yield Scaling
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Solution Overview
Problem
Existing microLED displays face challenges with yield reduction and the need for redesigning manufacturing processes for varying display sizes and shapes, particularly in larger applications like VR headsets and wearables, due to silicon backplanes and inefficient drive schemes.
Innovation Solution
A tiled or tile-able display system composed of independently fabricated and tested tiles, which can be arranged on a PCB to form displays of varying sizes and shapes, utilizing Through-Silicon Vias for connectivity and a serial data transmission method to efficiently drive pixels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If microLED displays are constructed with silicon backplanes for physically larger applications, then display size is increased, but yield continually reduces
Solution Approach 1:
The display is divided into multiple independently fabricated and tested tiles that can be assembled together. Each tile is a self-contained unit with its own silicon backplane and microLED array, allowing individual testing and replacement. This segmentation enables larger display areas to be constructed from multiple smaller, higher-yield tiles rather than attempting to manufacture one large low-yield tile.
2Area of stationary object
If display size gets larger, then more applications are covered, but manufacturing cost increases due to reduced yield
Solution Approach 1:
By segmenting the display into standard-sized tiles, the manufacturing process can be optimized for producing multiple identical units simultaneously. This allows economies of scale to be achieved in tile fabrication while maintaining high yield, as each tile is manufactured and tested independently before final assembly into the complete display.
Solution Approach 2:
The tiled architecture creates universal building blocks that can be used across multiple display sizes and configurations. The same tile design can be assembled in different quantities and arrangements to create various display formats, eliminating the need for custom manufacturing processes for each application and reducing overall manufacturing costs.
3Ease of manufacture
If TFT backplanes are used in LCD displays, then manufacturing cost is reduced, but power efficiency worsens due to excess resistance and backlight requirements
Solution Approach 1:
The patent employs TFT backplanes in the tile architecture, accepting their inherent power inefficiencies as a trade-off for significantly reduced manufacturing costs. The low cost of TFT fabrication allows the system to use inexpensive backplane technology while compensating for power losses through efficient overall system design and the ability to replace individual tiles if needed.
4Ease of manufacture
If OLED technology is used in portable displays, then manufacturing simplicity is improved, but display lifetime and brightness are limited
Solution Approach 1:
The display system uses a composite architecture combining TFT backplanes with microLED arrays. This composite structure leverages the manufacturing simplicity of TFT technology for the backplane while utilizing microLEDs for their superior lifetime and brightness characteristics, achieving a balance between ease of manufacture and performance durability.
Data Source
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AI summary
Displays, systems, and methods may be utilized in applications including, but not limited to, projectors, head-up displays, and augmented reality (AR), mixed reality (MR), and virtual reality (VR) systems or devices, such as headsets or other near-eye devices or systems. Tiled or Tile-able displays and methods, in accordance with the present invention, provide displays of varying sizes, and as such, a Tiled or Tile-able display is configured to accommodate the display size needed for various wearable and mobile devices that require or incorporate displays.