Tiled Stress-Alleviating Pad Structure for 3D Stacked Dies
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Solution Overview
Problem
The increasing density of semiconductor integrated circuits and mismatch in coefficients of thermal expansion (CTE) between various components in 3-D stacked dies lead to significant thermal-mechanical stresses, causing delamination and cracking of metal pad layers, which impacts yield and increases costs.
Innovation Solution
A tiled-stress-alleviating pad structure is fabricated by patterning a pad layer into a plurality of tiles with set geometry and uniform spacing over the last level of an integrated circuit, minimizing thermal-mechanical stresses by reducing interfacial peeling stress and CTE mismatch.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a continuous metal pad layer is used to support C4 elements and BLM layers, then the pad layer provides structural support and electrical connectivity, but thermal-mechanical stresses cause delamination and cracking due to CTE mismatch
Solution Approach 1:
The continuous pad layer is divided into multiple discrete tiles arranged in a grid pattern. Each tile is separated from adjacent tiles by gaps, transforming the monolithic structure into a segmented array. This segmentation allows each tile to independently accommodate thermal expansion and contraction, preventing stress accumulation that leads to delamination and cracking while maintaining overall structural support functionality.
2Reliability
If the pad layer is patterned into tiled structures with gaps, then thermal-mechanical stresses are reduced by accommodating CTE mismatch, but the continuous structural support is compromised
Solution Approach 1:
Multiple discrete pad tiles are arranged in a grid pattern and connected through underlying conductive structures (such as vias or trace networks) to function collectively as a unified pad structure. This merging approach allows the tiles to operate independently for stress relief while maintaining electrical connectivity and structural coherence through the combined network, thus preserving overall structural support capability.
3Ease of manufacture
If aluminum or aluminum alloy is used for the pad layer, then electrical conductivity and ease of fabrication are improved, but the higher CTE compared to other die components generates significant thermal-mechanical stresses
Solution Approach 1:
The aluminum or aluminum alloy pad layer is segmented into discrete tiles with gaps between them. This segmentation allows the high-CTE aluminum material to expand and contract independently in each tile without generating excessive stress in the surrounding structure, thereby maintaining the ease of fabrication benefits of aluminum while mitigating its high CTE disadvantage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The tiled-stress-alleviating pad structure effectively reduces thermal-mechanical stresses, minimizing the risk of delamination and cracking, thereby enhancing the yield and reducing costs by distributing stress uniformly across the pad structure.
Implementation Method 1
The tiled-stress-alleviating pad structure effectively reduces thermal-mechanical stresses, minimizing the risk of delamination and cracking, thereby enhancing the yield and reducing costs by distributing stress uniformly across the pad structure.
Data Source
AI summary
Structure and method for reducing thermal-mechanical stresses generated for a semiconductor device are provided, which includes a tiled-stress-alleviating pad structure.