Tiling Unit Depth Tests for Hidden Surface Removal

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Solution Overview

Problem

Graphics processing systems face inefficiencies when handling primitives with translucency and punch-through effects, as existing systems often require feedback loops between texturing/shading and hidden surface removal units, leading to redundant processing and reduced efficiency.

Innovation Solution

A graphics processing system with a tiling unit that performs depth tests on primitives and forwards depth information to a hidden surface removal unit, allowing for pre-filling of depth buffers and reducing unnecessary processing by determining which fragments are visible before texturing and shading.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If feedback loops are used between texturing/shading and hidden surface removal units to handle translucent and punch-through primitives, then processing accuracy is improved, but system complexity and processing time increase

Engineering Contradiction:
Improveprocessing accuracyVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing depth tests and determining visibility of fragments before the texturing and shading process. The hidden surface removal unit pre-determines which fragments are visible by testing against depth buffer values, and only processes those visible fragments through texturing and shading. This eliminates the need for feedback loops while maintaining processing accuracy, as the visibility determination is made in advance rather than requiring iterative feedback between units.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If all primitives are processed through both depth testing and texturing/shading, then completeness is improved, but processing time and energy consumption increase

Engineering Contradiction:
Improveprocessing completenessVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the depth testing function from the main processing pipeline and performs it separately before texturing and shading. The hidden surface removal unit extracts visibility information by testing fragment depths against the depth buffer, and only passes visible fragments to the texturing and shading unit. This extraction allows incomplete processing (skipping texturing/shading for invisible fragments) while maintaining reliability, as only visible fragments proceed through the full processing pipeline.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by processing only the necessary portion of primitives through the full texturing and shading pipeline. Instead of processing all primitives completely, the system performs partial processing by first determining visibility through depth testing, then only applying texturing and shading to visible fragments. This reduces processing time and energy consumption while maintaining processing completeness for the subset of fragments that are actually visible in the final image.

Inventive Principle:
Principle #16Partial or excessive action

3Speed

If depth information is stored on-chip for each tile, then processing speed is improved, but memory requirements increase

Engineering Contradiction:
Improveprocessing speedVSAvoidmemory requirements
Core Design Contradiction:
SpeedVSArea of stationary object

Solution Approach 1:

The patent segments the rendering space into multiple tiles, with each tile having its own depth buffer stored on-chip. This segmentation allows the system to maintain small, manageable depth buffer copies for each tile rather than requiring a single large depth buffer. The tiling unit divides the scene into tiles, and the hidden surface removal unit processes each tile independently using its local depth buffer, improving processing speed through parallelization while keeping memory requirements manageable through distributed storage.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20230334769A1Using tiling depth information in hidden surface removal in a graphics processing system
Publication Date: 2023.10.19 IMAGINATION TECH LTD
  • US20230334769A1 patent drawing
  • US20230334769A1 patent drawing
  • US20230334769A1 patent drawing

AI summary

A graphics processing system includes a tiling unit for performing tiling calculations and a hidden surface removal (HSR) unit for performing HSR on fragments of the primitives. Primitive depth information is calculated in the tiling unit and forwarded for use by the HSR unit in performing HSR on the fragments. This takes advantage of the tiling unit having access to the primitive data before the HSR unit performs the HSR on the primitives, to determine some depth information which can simplify the HSR performed by the HSR unit. Therefore, the final values of a depth buffer determined in the tiling unit can be used in the HSR unit to determine that a particular fragment will subsequently be hidden by a fragment of a primitive which is yet to be processed in the HSR unit, such that the particular fragment can be culled.