Tilted Charge Compensation Regions in Semiconductor Devices
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Solution Overview
Problem
Semiconductor devices with charge compensation structures face challenges in reducing switching losses and maintaining high breakdown voltages due to passive losses associated with floating p-doped pillar regions, which lead to increased resistance and heat generation.
Innovation Solution
The semiconductor device incorporates a design with p-type compensation regions that form pn-junctions with the drift region, extending from the active area into the peripheral area, and are tilted at an acute angle, reducing passive losses by minimizing the floating semiconductor regions and enhancing the current path efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If floating p-doped pillar regions are used in the peripheral area to ensure high breakdown voltages, then breakdown voltage is improved, but passive losses increase due to holes flowing through high resistive n-type semiconductor regions
Solution Approach 1:
The patent extracts and removes the problematic floating p-doped pillar regions from the peripheral area. By eliminating these regions that cause high passive losses, the invention achieves a significant reduction in energy loss (by a factor of 10 to 100 times) while maintaining the necessary breakdown voltage through alternative device architecture design.
2Reliability
If compensation regions are arranged vertically below the MOSFET structure, then charge compensation is achieved, but the current-carrying area is reduced
Solution Approach 1:
The patent transitions from a vertical arrangement of compensation regions below the MOSFET structure to a lateral arrangement within the same plane as the active area. This dimensional change allows compensation regions to be positioned side-by-side with the active MOSFET cells rather than underneath them, thereby maintaining full current-carrying area while achieving effective charge compensation through pn-junction formation.
3Loss of energy
If the doping concentration in the drift region is increased to reduce on-state resistance, then on-state resistance is reduced, but breakdown voltage decreases
Solution Approach 1:
The patent applies local quality by creating laterally alternating regions of high and low doping concentrations within the drift zone. Compensation regions with high doping concentration are positioned adjacent to active MOSFET cells with lower doping concentration. This local variation allows each region to be optimized for its specific function: high doping for low on-state resistance in current-carrying paths, and low doping for high breakdown voltage in voltage-blocking regions.
Solution Approach 2:
The patent utilizes parameter changes by forming pn-junctions between compensation regions and drift regions, creating localized potential barriers that dynamically adjust the electrical characteristics. The compensation regions with opposite polarity doping create depletion zones that extend into the drift region, effectively modulating the electric field distribution to simultaneously achieve low on-state resistance and high breakdown voltage through controlled parameter variations in space.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly reduces passive losses by up to 90% and lowers the on-state resistance, enabling the semiconductor device to operate effectively in applications with high current and voltage requirements while minimizing heat generation.
Implementation Method 1
compensation regions which form a pn-junction with the drift region
Implementation Method 2
The compensation principle is based on a mutual compensation of charges in n- and p-doped regions
Implementation Method 3
reducing passive losses by minimizing the floating semiconductor regions and enhancing the current path efficiency
Implementation Method 4
in Ohmic contact with the source metallization via a respective body region which is arranged in the active area and has a higher doping concentration than the compensation regions
Data Source
AI summary
A charge-compensation semiconductor device includes a semiconductor body having a first surface, a lateral edge delimiting the semiconductor body in a horizontal direction substantially parallel to the first surface, an active area, and a peripheral area arranged between the active area and the lateral edge. A source metallization is arranged on the first surface. A drain metallization is arranged opposite to the source metallization. The semiconductor body further includes a drift region in Ohmic contact with the drain metallization, and a plurality of compensation regions forming respective pn-junctions with the drift region, which are arranged in the active area and in the peripheral area, and are in Ohmic contact with the source metallization via respective body regions arranged in the active area and having a higher doping concentration than the compensation regions. In a horizontal cross-section substantially parallel to the first surface the compensation regions are at least in a respective portion shaped as a strip oriented in a direction which is tilted with respect to the lateral edge by a tilt angle.