Tilted Super Via Layout for Multi-Pitch Interconnect Routing

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Solution Overview

Problem

Conventional semiconductor manufacturing processes face challenges in connecting routing layers with different pitches without the need for intermediate layers, leading to routing congestion, increased resistance, and capacitance due to the use of traditional vertical or perpendicular vias.

Innovation Solution

The formation of tilted super vias that connect routing layers on different pitches without intermediate layers, achieved through non-orthogonal etching and deposition processes, reducing the need for intermediate routing layers and minimizing parasitic effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If traditional vertical or perpendicular vias are used to connect routing layers, then the connection between routing layers is achieved, but routing congestion increases and space is wasted

Engineering Contradiction:
Improverouting spaceVSAvoidrouting congestion
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent transitions from traditional vertical vias to tilted vias that extend at an angle between 0 and 90 degrees relative to the substrate. This angular orientation allows the via to connect routing layers on different pitches without requiring intermediate layers, effectively utilizing three-dimensional space to reduce routing congestion and optimize space utilization in the interconnect structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If intermediate routing layers are used to connect routing layers on different pitches, then connection is achieved, but resistance and capacitance increase

Engineering Contradiction:
Improveelectrical performanceVSAvoidnumber of intermediate layers
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the intermediate routing layer from the interconnect structure by implementing a tilted via that directly connects the first and second routing layers on different pitches. This removal of the intermediate layer reduces the number of interfaces and contact resistances, thereby lowering overall resistance and capacitance while improving electrical performance.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

By introducing the tilted via at an angle between 0 and 90 degrees, the patent creates a direct three-dimensional connection path between routing layers on different pitches, bypassing the need for intermediate layers and reducing parasitic effects associated with multiple interfaces.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Area of stationary object

If tilted super vias are used to connect routing layers on different pitches without intermediate layers, then routing congestion is reduced and space is saved, but the etching process becomes more complex

Engineering Contradiction:
Improverouting spaceVSAvoidetching process
Core Design Contradiction:
Area of stationary objectVSEase of manufacture

Solution Approach 1:

The patent modifies the etching process parameters to achieve the tilted via profile, including controlling the angle between 0 and 90 degrees relative to the substrate. This may involve adjusting plasma etching conditions, using specific etch chemistries, or implementing angled incidence etching to create the non-vertical via structure while maintaining manufacturing feasibility.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces routing congestion, saves space, lowers resistance and capacitance, and improves metal routing density by eliminating the need for intermediate layers, thereby enhancing device performance.

Implementation Method 1

The methods may include etching a non-orthogonal feature into the semiconductor structure

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS20250385176A1Tilted super vias
Publication Date: 2025.12.18 APPLIED MATERIALS INC
  • US20250385176A1 patent drawing
  • US20250385176A1 patent drawing
  • US20250385176A1 patent drawing

AI summary

Exemplary semiconductor structures may include a substrate, a first interconnect, an insulator material, and a second interconnect. The second interconnect may be separated from the first interconnect by the insulator material. The structures may include a tilted super via connecting the first interconnect to the second interconnect. The structures may include a third interconnect disposed between the first interconnect and the second interconnect. The tilted super via may bypass the third interconnect.