Tilted VCSEL Emitter Layout for Accurate ToF Dot Projection

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Solution Overview

Problem

Conventional vertical-cavity surface-emitting laser (VCSEL) arrays with emitter patterns aligned parallel to the chip edge or DOE axis produce homogeneous dot projections, leading to inaccurate indirect-time-of-flight measurements and increased risk of emitter failure due to crystal plane defects.

Innovation Solution

A VCSEL array with an emitter pattern oriented at a non-zero angle to the DOE or chip edge, comprising multiple unit cells with consistent emitter arrangements to minimize misalignment and propagate defects, generating a heterogeneous dot projection that enhances measurement accuracy and robustness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the emitter pattern is aligned parallel to the chip edge or DOE axis, then the manufacturing and alignment process is simplified, but the dot projection becomes homogeneous leading to measurement inaccuracies and increased emitter failure risk

Engineering Contradiction:
Improveemitter alignment processVSAvoidindirect-time-of-flight measurement accuracy
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent applies asymmetry by orienting the emitter pattern at a non-zero angle (e.g., 10-20 degrees) relative to the chip edge or DOE axis. This asymmetric orientation creates a heterogeneous dot projection pattern where dots are distributed more uniformly across the field of view, preventing the homogeneous clustering that occurs with parallel alignment. This resolves the contradiction by maintaining manufacturing simplicity while achieving measurement accuracy through the asymmetric angular offset.

Inventive Principle:
Principle #4Asymmetry

2Device complexity

If the emitter pattern is aligned parallel to the chip edge, then the emitter arrangement is simpler, but the risk of emitter failure increases due to crystal plane defects propagating along aligned rows

Engineering Contradiction:
Improveemitter arrangement structureVSAvoidemitter failure resistance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

By orienting the emitter pattern at a non-zero angle relative to the chip edge, the patent disrupts the alignment between emitter rows and crystal plane defects. This asymmetric arrangement prevents defects from propagating systematically along parallel rows, thereby improving reliability without significantly increasing device complexity. The angular offset breaks the correlation between structural alignment and defect propagation paths.

Inventive Principle:
Principle #4Asymmetry

3Measurement precision

If a tilted emitter pattern is used to create heterogeneous dot projection, then measurement accuracy improves, but the alignment precision between unit cells becomes more challenging

Engineering Contradiction:
Improvedot projection measurement accuracyVSAvoidunit cell alignment precision
Core Design Contradiction:
Measurement precisionVSManufacturing precision

Solution Approach 1:

The patent segments the emitter pattern into repeating unit cells, each containing a specific angularly-offset arrangement of emitters. By defining a standardized unit cell that can be replicated across the array, the system maintains manufacturing precision through modular reproduction. The segmentation approach allows the tilted pattern to be implemented systematically, ensuring consistent angular orientation across all unit cells while maintaining alignment precision through repeated modular structures.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution results in a more accurate and reliable dot projection for indirect-time-of-flight systems, reducing emitter failures and improving the performance and robustness of the VCSEL array by preventing defect propagation.

Implementation Method 1

light emitted by emitters of the emitter array is collimated by the lens

Methodology Applied
Scientific EffectLight emission: Laser

Implementation Method 2

The DOE diffracts a given beam of light such that diffracted orders of the given beam are transmitted by the DOE at different angles

Methodology Applied
Scientific EffectDiffraction: Diffraction

Data Source

PatentUS11862942B2Vertical-cavity surface-emitting laser array with a tilted emitter pattern
Publication Date: 2024.01.02 WELLS FARGO BANK NA
  • US11862942B2 patent drawing
  • US11862942B2 patent drawing
  • US11862942B2 patent drawing

AI summary

A VCSEL array may include a semiconductor substrate and a plurality of emitters on the substrate that conforms to an emitter pattern. The emitter pattern may be oriented at a non-zero angle to an edge of the substrate and may comprise two or more unit cells arranged to form the emitter pattern. Each unit cell, of the two or more unit cells, may include a same number of emitters, and the two or more unit cells may be arranged to cause a measurement of misalignment associated with two adjacent unit cells, of the two or more unit cells, to satisfy a misalignment threshold.