Integrated TIM-on-Die Packaging for Low-Profile Heat Conduction

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Solution Overview

Problem

Current heat conduction schemes for semiconductor controllers, such as mounting a heat sink on top of the mold compound, add height to the overall controller and are not very effective at removing heat, especially for high-speed graphics processing units and AI processing units.

Innovation Solution

Integrating a thermal interface material (TIM) layer on top of the controller semiconductor die, which is then encapsulated within a mold compound, allowing the TIM layer to be exposed on the upper surface for efficient heat conduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If a heat sink is mounted on top of the mold compound to draw heat away from the controller, then heat removal is attempted, but the overall height of the controller increases and heat removal effectiveness is insufficient

Engineering Contradiction:
Improveheat removal effectivenessVSAvoidcontroller height
Core Design Contradiction:
TemperatureVSLength of stationary object

Solution Approach 1:

The patent combines the thermal interface material layer with the controller die structure itself, integrating the heat conduction function directly into the controller assembly rather than adding a separate heat sink component on top of the mold compound. This merging approach improves heat removal effectiveness while avoiding the height penalty of external heat sinks.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from a vertical heat dissipation approach (heat sink mounted on top of mold compound) to a horizontal/integrated approach where the TIM layer is positioned between the controller die and the mold compound, allowing heat to conduct through the mold compound in a different dimensional path without increasing overall height.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of energy

If a heat sink is mounted on top of the mold compound, then heat conduction is attempted, but the heat conduction effectiveness is not sufficient for high-speed graphics processing units and AI processing units

Engineering Contradiction:
Improveheat conduction effectivenessVSAvoidheat conduction scheme complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent introduces a thermal interface material layer as an intermediary between the controller die and the mold compound. This TIM layer serves as a specialized mediator that improves thermal coupling and heat conduction effectiveness, addressing the insufficient heat removal of conventional direct mounting approaches without requiring complex active cooling systems.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The TIM layer provides effective heat conduction away from the controller die while maintaining a low profile, enhancing thermal management without increasing the overall height of the semiconductor controller.

Implementation Method 1

the TIM layer configured to conduct heat away from the controller semiconductor die

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20250391732A1Semiconductor device including an integrated tim-on-die
Publication Date: 2025.12.25 SANDISK TECHNOLOGIES LLC
  • US20250391732A1 patent drawing
  • US20250391732A1 patent drawing
  • US20250391732A1 patent drawing

AI summary

A semiconductor controller includes a controller semiconductor die having an integrated thermal interface material layer, or TIM formed on top of the die. In embodiments, the controller semiconductor die may be mounted on a substrate, for example in a flip-chip configuration. Thereafter, the TIM may be positioned on an upper surface of the controller semiconductor die and the TIM and controller semiconductor die may be positioned within a mold chase for encapsulation in mold compound. After encapsulation, the TIM may be exposed in an upper surface of the encapsulated controller semiconductor die.