Semiconductor Package TIM Separation for Under-Fill Crack Prevention
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Solution Overview
Problem
Semiconductor packages face reliability issues due to cracking in thermal interface material layers and under-fill layers caused by differences in physical properties, leading to potential disconnection of internal connection terminals during temperature variations.
Innovation Solution
Incorporating an empty space between the thermal interface material segments and under-fill protrusions to prevent stress and cracking, ensuring the thermal interface material layer and under-fill layers are thermally expanded without contacting each other, thereby maintaining package integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thermal interface material layer and under-fill layer are in direct contact during thermal expansion, then stress concentration occurs leading to cracking, but maintaining separation requires additional structural design
Solution Approach 1:
The patent divides the interface region between thermal interface material and under-fill layer into separate zones by introducing an empty space, preventing direct contact and stress concentration. This segmentation of the interface structure resolves the contradiction by maintaining material separation while preserving overall package integrity.
Solution Approach 2:
The empty space acts as an intermediary element between the thermal interface material layer and under-fill layer, preventing direct interaction during thermal expansion. This intermediary structure eliminates stress concentration points while maintaining the functional integrity of both layers.
2Volume of moving object
If multiple layers are tightly packed to reduce package size, then manufacturing precision requirements increase, but loose packaging increases overall device volume
Solution Approach 1:
By segmenting the interface region into distinct zones with an empty space, the patent reduces the precision requirements for layer alignment. The empty space creates a buffer zone that accommodates manufacturing tolerances while maintaining compact overall package dimensions.
3Ease of manufacture
If thermal interface material and under-fill layer are in direct contact, then manufacturing process is simpler, but reliability decreases due to stress-induced cracking during temperature variations
Solution Approach 1:
The empty space serves as a passive intermediary that requires no additional manufacturing steps or materials while effectively preventing stress-induced cracking during temperature cycling. This maintains manufacturing simplicity while dramatically improving temperature cycle reliability.
4Productivity
If empty space is introduced to prevent cracking, then manufacturing yield improves, but device volume increases
Solution Approach 1:
The empty space is introduced locally only at the interface region between thermal interface material and under-fill layer, rather than throughout the entire package. This localized approach minimizes volume increase while maximizing the benefit to manufacturing yield by preventing cracking at the most critical stress concentration point.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability of semiconductor packages by reducing the occurrence of cracks and improving manufacturing yield by maintaining the separation between thermal interface material segments and under-fill protrusions during temperature variations.
Implementation Method 1
a thermal interface material layer (70) is interposed between the heat sink (80) and the first semiconductor chip (50) and between the heat sink (80) and the second semiconductor chip (60)
Implementation Method 2
An adhesive layer (82) may be interposed between the first substrate (10) and a bottom surface of the heat sink (80)
Data Source
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AI summary
Disclosed is a semiconductor package comprising first and second semiconductor structures spaced apart on a first substrate, a heat sink covering the first and second semiconductor structure and the first substrate, and a thermal interface material layer between the heat sink and the first and second semiconductor structures. The first semiconductor structure includes a first sidewall adjacent to the second semiconductor structure and a second sidewall opposite the first sidewall. The thermal interface material layer includes a first thermal interface material segment between the first and second semiconductor structures and a second thermal interface material segment protruding beyond the second sidewall. A first distance from a top surface of the first substrate to a lowest point of a bottom surface of of the first thermal interface material segment is less than a second distance from the top surface of the first substrate to a lowest point of a bottom surface of the second thermal interface material segment.