Time Amplifier Circuit With Regeneration Stop for Low Power
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional time amplifiers face increased power consumption due to high regeneration time and limited gain, which is exacerbated by the charging and discharging of capacitors, and attempts to reduce power consumption by decreasing gain result in limited amplification.
Innovation Solution
A time amplifier design that controls voltage levels applied to a charging unit instead of gain amplification, incorporating a first and second signal regeneration circuit with latch units, delay circuits, and switching units to stop signal regeneration operations when output signals reach a high level, thereby reducing unnecessary current flow and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the regeneration time increases to amplify time difference with higher gain, then the amplification precision is improved, but the power consumption increases due to increased current and voltage during capacitor charging/discharging
Solution Approach 1:
The patent implements periodic action by controlling the capacitor charging/discharging cycles through regulated voltage application. The voltage is applied periodically only when needed for amplification, and stopped when output signals reach high level, converting continuous power consumption into controlled periodic action that maintains measurement precision while reducing overall energy usage.
Solution Approach 2:
The patent applies parameter changes by dynamically adjusting the voltage level applied to the capacitor based on the amplification stage. Instead of maintaining constant high voltage throughout operation, the voltage parameter is changed and regulated to match the actual amplification needs, reducing power consumption during non-critical phases while preserving measurement precision during active amplification.
2Use of energy by moving object
If the regeneration time is decreased to reduce power consumption, then the power usage is reduced, but the gain is limited to minimum gain
Solution Approach 1:
The patent implements dynamics by making the regeneration time adjustable rather than fixed. The system dynamically adapts the regeneration time based on the required amplification gain and power consumption constraints. This allows the circuit to operate with shorter regeneration times for low-power modes while extending them when higher gain is needed, resolving the contradiction between power reduction and maintaining amplification capability.
3Measurement precision
If voltage is continuously applied to capacitor for high gain amplification, then the amplification precision is improved, but power consumption increases due to continuous charging/discharging operations
Solution Approach 1:
The patent applies the taking out principle by extracting and removing the continuous voltage application requirement. Instead of continuously charging/discharging the capacitor, the system selectively applies voltage only during necessary amplification intervals and stops it when output signals reach high level. This extraction of continuous operation eliminates unnecessary energy loss while preserving essential amplification precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively minimizes power consumption by eliminating crowbar currents and reducing voltage loaded on capacitors, allowing the time amplifier to maintain high gain while reducing power usage during charging and discharging.
Implementation Method 1
Basically, a time amplifier employs an SR latch (disclosed in Korean Patent Publication No. 10-2014-0125950 (published on Oct. 30, 2014)) and a gain amplifier to amplify a time difference (input value) between two input signals using metastability of a transistor.
Data Source
AI summary
A time amplifier includes a first signal regeneration circuit, a second signal regeneration circuit, a first delay circuit configured to receive the second input signal and output the delayed second input signal by a predetermined delay time, and a second delay circuit configured to receive the first input signal and output the delayed first input signal by the predetermined delay time. A corresponding signal regeneration operation is stopped when at least one of the first and second output signals is high. The at least one output signal remains high.