Time-Based ADC Conversion With Single-Comparator Architecture
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Solution Overview
Problem
Existing analog-to-digital converters, such as flash, successive approximation, and Wilkinson types, face challenges in miniaturization due to large circuit sizes and increased leakage current, particularly with capacitive elements and MOS switches, which affect resolution and accuracy.
Innovation Solution
An analog-to-digital converter design that utilizes a comparator to compare an input analog potential with a reference potential and measures the comparison operation time to output a digital conversion value, eliminating the need for multiple comparators and capacitive elements, and incorporating a time measurement circuit to calculate the digital conversion value based on correlation characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If flash type AD converter uses (2n-1) comparators for high-speed conversion, then conversion speed is improved, but circuit size increases significantly
Solution Approach 1:
The patent merges multiple comparison operations into a single comparator by combining the input analog signal with reference potentials through additive circuits. Instead of using (2n-1) separate comparators, the invention uses one comparator to perform multiple comparisons by varying reference potentials dynamically, thereby reducing circuit area while maintaining high-speed conversion capability
Solution Approach 2:
The invention dynamically changes reference potentials during the conversion process. By adding reference potentials to the input signal and varying these reference levels, a single comparator can perform multiple comparison operations that would traditionally require multiple static comparators, enabling both high speed and compact circuit design
2Measurement precision
If successive approximation type AD converter uses CDAC with (2n) capacitive elements, then conversion accuracy is improved, but circuit size and leakage current increase
Solution Approach 1:
The patent extracts the comparison function from the large capacitive array of successive approximation converters. By removing the CDAC structure with (2n) capacitive elements and using a different comparison mechanism based on additive reference potentials, the invention achieves conversion accuracy without requiring large capacitive arrays, thus reducing circuit area and leakage current
Solution Approach 2:
The invention replaces the mechanical capacitive switching system of successive approximation converters with an electronic signal processing approach. Instead of physically switching large capacitors, the system uses additive circuits to generate comparison signals, eliminating the need for large capacitive elements and their associated leakage current problems
3Measurement precision
If Wilkinson type AD converter uses large capacitive element for sampling, then differential linearity is improved, but circuit size increases exponentially
Solution Approach 1:
The patent extracts the sampling function from the large capacitive element of Wilkinson converters. By removing the large sampling capacitor and using direct voltage comparison with additive reference potentials, the invention achieves excellent differential linearity without requiring large capacitance values, thereby preventing exponential area increase with higher resolution
4Device complexity
If AD converter uses miniaturized elements for digital logic, then integration density is improved, but leakage current increases
Solution Approach 1:
The patent converts the harmful leakage current effect into a useful measurement signal. By designing the comparison circuit to operate in a regime where leakage current is present, the invention uses the leakage current as part of the comparison mechanism rather than trying to eliminate it, thereby maintaining high integration density without suffering from increased errors due to leakage
Data Source
AI summary
An analog-to-digital converter is disclosed that converts an input analog potential to a digital conversion value. An analog-to-digital converter according to one or more embodiments may include a comparator that compares the input analog potential with a reference potential; and a conversion circuit that measures comparison operation time from a start to an end of a comparison operation by the comparator and outputs the digital conversion value according to the measured comparison operation time and a comparison result by the comparator.


