Time Capture Across Clock Domains With Latency Compensation
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Solution Overview
Problem
Communication networks face challenges in accurately capturing and transferring time between different clock domains due to latency and jitter, which degrades the precision of time synchronization across clock domain crossings.
Innovation Solution
A method and apparatus that involve sending a request signal across clock domains, adjusting time values to compensate for latency and jitter, and using synchronizer circuits to minimize jitter, allowing for accurate time transfer by determining latency in the receiving clock domain rather than the sending domain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If time values are transferred between clock domains using conventional synchronization methods, then time transfer functionality is achieved, but latency and jitter degrade time synchronization accuracy
Solution Approach 1:
The patent applies preliminary action by measuring and compensating for latency in the request path before the actual time capture occurs. The system measures latency from the request signal sent from the second clock domain to the first clock domain, then uses this pre-measured latency value to adjust the captured time value, thereby compensating for the time loss before it affects the final synchronized time.
Solution Approach 2:
The patent implements feedback by using the measured latency information to adjust and compensate the captured time value. The system continuously measures latency between clock domains and feeds this information back to correct the time synchronization, creating a closed-loop system that actively compensates for time loss and jitter.
2Adaptability or versatility
If multiple clock signals are used in different clock domains, then operational flexibility and independence are improved, but time alignment and synchronization between domains deteriorate
Solution Approach 1:
The patent uses an intermediary approach by introducing a measurement and compensation mechanism that mediates between independent clock domains. The system measures latency in the request path and uses this intermediate measurement to bridge the time alignment gap between independent clock domains, allowing them to maintain independence while achieving accurate synchronization.
Solution Approach 2:
The patent applies parameter changes by dynamically adjusting the captured time value based on measured latency parameters. The system changes the time parameter by adding or subtracting the measured latency value, thereby adapting the time synchronization to the actual conditions between independent clock domains.
Data Source
AI summary
A first request signal that indicates a request for a time maintained by a clock implemented in first circuitry is sent from second circuitry. The first circuitry utilizes a first clock signal derived from a first oscillator and the second circuitry utilizes a second clock signal derived from a second oscillator. The first circuitry adjusts a first time value from the clock to compensate for a first latency or jitter caused by converting the first request signal to a second request signal synchronized to the first clock. The second circuitry further adjusts the adjusted first time value to generate a second time value that compensates for i) a second latency between sending the first request signal and receiving the adjusted first time value, and ii) a third latency or jitter caused by synchronizing the adjusted first time value to the second clock.