Time-Coherent Global Network Architecture
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Solution Overview
Problem
Current wide-coverage data networks face performance degradation due to their multi-hop nature and require simplification to support high-quality broadband services efficiently, with a need for fast-switching optical core nodes that minimize network diameter and reduce the number of intermediate nodes in signal transmission.
Innovation Solution
A network architecture featuring a matrix arrangement of switch units and edge nodes with time-coherent switching, utilizing upstream and downstream wavelength routers to connect edge nodes directly to switch units, and employing single-rotator circulating switches to maintain data stream order and reduce transit delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multi-hop packet-switching networks are used to provide wide coverage, then network coverage area is improved, but network performance degrades due to cumulative degradation across numerous routing nodes
Solution Approach 1:
The network is segmented into two distinct functional layers: a core optical layer for high-speed transport and an edge electronic layer for packet processing. This segmentation allows the core layer to provide wide coverage through optical routing without suffering from cumulative performance degradation, while the edge layer handles packet switching with minimal nodes, thus resolving the contradiction between coverage area and performance
Solution Approach 2:
The patent replaces electronic packet switching with optical circuit switching in the core network layer. By substituting electronic signals with optical signals for core routing, the network achieves high-speed transmission without the cumulative performance degradation associated with multiple electronic routing nodes, thereby maintaining performance while providing wide coverage
2Area of stationary object
If the number of intermediate nodes is increased to provide wide coverage, then network coverage is improved, but network diameter increases and performance degrades
Solution Approach 1:
The patent introduces a dimensional change by adding an optical layer above the traditional electronic network layer. This allows the network to provide wide coverage through optical routing in the core layer without increasing the number of electronic intermediate nodes in the packet-switching dimension, thus reducing network diameter while maintaining coverage
3Adaptability or versatility
If electronic packet switching is used to route data through multiple nodes, then network versatility is improved, but transmission speed decreases due to cumulative performance degradation
Solution Approach 1:
The patent substitutes electronic packet switching with optical circuit switching for core network routing. This substitution enables high-speed transmission in the core layer while electronic packet switching is retained only at edge nodes for protocol conversion and access control, thus maintaining network versatility while achieving high transmission speed
Solution Approach 2:
The network functionality is segmented between optical circuit switching in the core layer for high-speed routing and electronic packet switching at edge nodes for protocol handling. This segmentation allows the system to achieve both high transmission speed in the core and the versatility of packet switching at the edges
Data Source
AI summary
A network of global coverage, scalable to hundreds of petabits per second, comprises bufferless switch units each of dimension n×n, n>1, arranged in a matrix of ν columns and ν rows, ν>1, interconnecting a maximum of ν×n edge nodes. Each edge node has ν upstream channels to ν switch units in ν different columns and ν downstream channels from ν switch units in ν different rows. All upstream channels to a switch unit are time-locked to the switch unit, thus enabling coherent switching at the switch unit.The switch units are preferably fast-switching optical nodes. Alternatively, the switch units may comprise fast-switching optical nodes each of dimension m×m, arranged in a first μ×μ matrix, and latent space switches each of dimension n×n, n>1, arranged in a second ν×ν matrix, ν>1, where μ×m=ν×n. An edge node time locks to each optical node and each latent space switch to which it connects.


