Time Constant Circuit for Rush Current Control in Display Devices
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Solution Overview
Problem
Existing time constant circuits for reducing rush current in display devices increase circuit scale and delay the start timing of output voltage, leading to longer times for image display, as they require large time constants to effectively attenuate gate voltage.
Innovation Solution
A serial-parallel circuit structure using multiple parallel circuits with resistance and capacitance elements connected in series between input and output terminals, allowing the output voltage to attenuate gradually after an initial steep attenuation, thereby reducing rush current without delaying the start timing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single capacitor and resistor are used in parallel between gate and source of FET to control rush current, then the circuit scale remains simple, but the start timing of output voltage is delayed
Solution Approach 1:
The patent divides the single RC circuit into multiple parallel RC circuits connected in series between gate and source. Each parallel RC circuit has its own time constant, creating a segmented approach to voltage attenuation that reduces overall delay while maintaining simplicity.
Solution Approach 2:
The patent changes the parameters by using multiple RC circuits with different time constants (R1C1, R2C2, etc.) instead of a single time constant. This allows optimization of both rush current control and start timing by selecting appropriate resistance and capacitance values for each stage.
2Object-generated harmful factors
If a voltage control circuit with operation amplifier is used to control gate-source voltage, then rush current is decreased, but the circuit scale becomes extremely large
Solution Approach 1:
The patent extracts the essential function of voltage control from the complex operation amplifier circuit and implements it using only passive RC elements. By removing the active operation amplifier component, the circuit scale is dramatically reduced while retaining the rush current control capability.
Solution Approach 2:
The patent replaces expensive and complex operation amplifiers with simple, inexpensive passive RC circuits. The multiple parallel RC circuits provide the necessary voltage control function at a fraction of the cost and complexity of an op-amp-based solution.
3Object-generated harmful factors
If a large time constant is used in the RC circuit to attenuate gate voltage, then rush current is reduced, but the start timing of output voltage is delayed
Solution Approach 1:
The patent segments the single large time constant into multiple smaller time constants arranged in series. This segmentation allows the gate voltage to be attenuated in stages, reducing rush current while maintaining a faster overall response time compared to a single large time constant.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed circuit structure effectively decreases rush current while maintaining a simple circuit design, allowing for quicker startup of display devices and reducing the time to display an image by controlling the gate potential's steep initial change and gradual subsequent attenuation.
Implementation Method 1
a capacitance element (121, 122); wherein when a direct current voltage is applied between the first terminal (14) and the second terminal (15), an output voltage changes depending of the sum of a plurality of exponential functions
Implementation Method 2
a resistance element (111, 112) connected in parallel to the capacitance element (121, 122)
Data Source
AI summary
To provide a time constant circuit and the like capable of acquiring a characteristic of an output voltage that attenuates gradually after attenuating steeply, compared to a characteristic that attenuates monotonously. The time constant circuit includes: a series/parallel circuit formed by serially connecting a plurality of parallel circuits each formed with a resistance element and a capacitance element between a first terminal and a second terminal; and a voltage-dividing resistance element connected between a third terminal connected to the second terminal and a fourth terminal. A first parallel circuit is formed with a first resistance element and a first capacitance element, a second parallel circuit with a second resistance element and a second capacitance element, and an n-th parallel circuit with an n-th resistance element and an n-th capacitance element. Note that ānā is the number of the parallel circuits and it is an integer of 2 or larger.


