Time-Difference Adder Circuit for Low-Voltage Sigma-Delta TDCs
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Solution Overview
Problem
As design rules for semiconductor devices decrease, the signal-to-noise ratio (SNR) in the voltage domain deteriorates, leading to performance issues in analog-to-digital converters (ADCs) under low power supply voltage conditions, prompting the need for alternative methods to process signals effectively in digital form.
Innovation Solution
A system-on-chip (SOC) incorporating a time difference adder, accumulator, and sigma-delta time-to-digital converter that processes time differences between input signals, converting them into digital signals using a time difference adder with register units and offset delay units, and accumulates these differences to enhance signal processing in a sigma-delta manner.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If analog-to-digital converter (ADC) is used to convert voltage signal into digital signal, then voltage signal processing is achieved, but signal-to-noise ratio (SNR) deteriorates under low power supply voltage conditions
Solution Approach 1:
The patent replaces the voltage domain signal processing mechanism (ADC) with a time domain signal processing mechanism (TDC). Instead of converting voltage signals to digital signals directly, the system first converts time differences between input signals to digital values using a time-to-digital converter, thereby avoiding the SNR deterioration issue that plagues voltage domain processing under low power conditions.
Solution Approach 2:
The patent changes the domain of signal processing from voltage to time. By measuring time differences between input signals instead of voltage levels, and converting these time differences to digital values, the system achieves better SNR performance. The time domain processing is less sensitive to power supply voltage variations compared to voltage domain processing.
2Productivity
If design rule decreases, then device integration increases, but signal-to-noise ratio (SNR) of voltage signal decreases
Solution Approach 1:
The patent substitutes voltage domain signal processing with time domain signal processing. The time-to-digital converter measures time differences between input signals and converts them to digital values, providing robust SNR performance even when design rules are reduced and device integration is increased, which would otherwise degrade voltage signal quality.
3Measurement precision
If time difference adder and accumulator are used to process signals in time domain, then signal-to-noise ratio increases, but device complexity increases
Solution Approach 1:
The patent divides the time difference processing function into separate modular components: a time difference adder that adds time differences between input signals, and a time difference accumulator that accumulates these summed time differences. This segmentation allows each component to perform a specific function with optimized circuit design, achieving good SNR while managing device complexity through functional decomposition.
Solution Approach 2:
The time difference adder and accumulator are designed as universal building blocks that can be used in various signal processing applications. These modules process time differences in a standardized manner, providing a versatile solution that achieves high SNR performance across different implementations while reusing the same core circuitry.
Data Source
AI summary
A time difference adder included in a system-on-chip (SOC) includes a first register unit and a second register unit. The first register unit is configured to receive first and second input signals having a first time difference, and generate a first output signal in response to a first signal. The second register unit is configured to receive third and fourth input signals having a second time difference, and generate a second output signal having a third time difference with respect to the first output signal in response to the first signal. The third time difference corresponds to a sum of the first time difference and the second time difference.