Time-to-Digital Circuit with Coarse-Fine Phase Comparison
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Solution Overview
Problem
Existing time digital conversion circuits face challenges in achieving high resolution and broad dynamic range without significantly increasing measurement time, as they require repeated measurement periods to synchronize clock signals, leading to prolonged measurement times.
Innovation Solution
A circuit device with a clock generation circuit generating two clock signals of different frequencies, a signal generation circuit producing multiple transition timing signals, and a phase comparison circuit to update clock counts based on phase comparisons, allowing for faster convergence of transition timings and reduced measurement periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the time digital conversion circuit uses repeated measurement periods to synchronize clock signals and update clock counts, then the measurement precision and dynamic range are improved, but the measurement time is prolonged
Solution Approach 1:
The patent segments the measurement process into multiple parallel phase comparison operations. Instead of sequentially updating clock counts through repeated measurement periods, the invention performs simultaneous phase comparisons between the second signal and multiple judging signals (first coarse-judging signal, fine-judging signal, second coarse-judging signal) within a single measurement period. This parallel segmentation of the measurement process enables faster convergence to the correct clock counts while maintaining high measurement precision.
Solution Approach 2:
The patent implements preliminary action by generating multiple judging signals (coarse and fine) in advance within the same measurement period before the measurement concludes. These judging signals are prepared beforehand at different transition timings of the second clock signal, allowing the phase comparison circuit to perform multiple comparisons simultaneously and determine the correct clock counts without requiring repeated measurement periods.
2Adaptability or versatility
If the time digital conversion circuit increases the number of measurement periods to achieve broader dynamic range, then the adaptability is improved, but the productivity is reduced
Solution Approach 1:
The patent adds another dimension to the measurement process by introducing multiple judging signals with different transition timings within the same measurement period. Instead of extending the measurement time to achieve broader dynamic range, the invention utilizes the time dimension more efficiently by layering multiple comparison operations (coarse and fine judgments) within the same temporal window, thereby expanding dynamic range without sacrificing measurement speed.
Data Source
AI summary
A circuit device includes a clock generation circuit, a signal generation circuit, a phase comparison circuit, and a processing circuit. The signal generation circuit generates a first signal making the transition at a transition timing of a first clock signal, a fine-judging signal making the transition at a transition timing of a second clock signal, a first coarse-judging signal making the transition at a transition timing of the second clock signal anterior to the fine-judging signal, and a second coarse-judging signal making the transition at a transition timing of the second clock signal posterior to the fine-judging signal. The phase comparison circuit performs the phase comparison between the second signal making the transition based on the first signal and each of the fine-judging signal, the first coarse-judging signal, and the second coarse-judging signal. The processing circuit sets the transition timing of the first signal and the transition timing of the fine-judging signal based on the phase comparison result, and converts a time difference between the first signal and the second signal into a digital value based on the setting result.