Time-to-Digital Converter with Synchronized State Transition Capture
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Solution Overview
Problem
Existing time interval measurement circuits, such as those described in Patent Literature 1, suffer from inaccuracies due to independent operation of high-frequency counters and ring oscillators, leading to potential wrong state information acquisition during transition state timing.
Innovation Solution
A time-to-digital converter is designed with a state transition section using a tapped delay line, logic circuit, and state machine, which outputs state information represented by count and propagation information, and an arithmetic operation section that calculates time digital values based on state transitions, correcting for delay elements and integrating weighted transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a high-frequency counter and ring oscillator operate independently to acquire coarse and fine values, then the measurement circuit can obtain time interval data, but wrong state information is likely to be acquired due to fluctuations in acquisition timing and oscillation
Solution Approach 1:
The patent merges the high-frequency counter and ring oscillator into a unified state transition section where both components operate in synchronization. The counter and oscillator share a common clock signal and update mechanism, ensuring that coarse and fine values are acquired at the same timing moment, thereby eliminating the reliability issue of independent operation while maintaining measurement precision
Solution Approach 2:
The patent implements a feedback mechanism where the state transition section monitors its own internal state and uses this information to control the acquisition timing. The latched value from the ring oscillator provides feedback that synchronizes with the counter output, ensuring that state information is only acquired when both components are in a valid synchronized state, thus preventing wrong state information acquisition
2Measurement precision
If state information is updated frequently to capture rapid transitions, then measurement resolution improves, but the system may acquire wrong state information due to insufficient time for stable state establishment
Solution Approach 1:
The patent applies preliminary action by pre-establishing the synchronization relationship between the counter and ring oscillator before actual measurement begins. The system prepares the state transition section with predetermined timing relationships and validation criteria, so that when measurements are taken, the state information is guaranteed to be valid without requiring frequent updates that could compromise reliability
3Reliability
If the state transition section uses complex logic to ensure accurate state capture, then measurement reliability improves, but device complexity increases
Solution Approach 1:
The patent uses homogeneous logic elements throughout the state transition section, employing the same type of flip-flops and logic gates for both the counter and ring oscillator components. This uniform approach simplifies the overall circuit design while maintaining reliable state capture, as the homogeneous elements behave predictably and can be validated using the same criteria
Data Source
AI summary
A time to digital converter includes a state transition section configured to start, based on a trigger signal, state transition in which an internal state transitions, a transition-state acquiring section configured to acquire, in synchronization with a reference signal, state information from the state transition section and hold the state information, and an arithmetic operation section configured to calculate, based on the state information, a time digital value corresponding to the number of times of transition of the internal state. The state transition section includes a tapped delay line to which a plurality of delay elements are coupled, a logic circuit, and a state machine. The state information is represented by count information output from the state machine and propagation information output from the tapped delay line. A hamming distance of the state information before and after the state transition is 1. A time from when the internal state transitions from a first internal state to a second internal state until when the internal state reverts to the first internal state is longer than a time interval for updating the state information held by the transition-state acquiring section.