Time Dithering Unit for HDR Image Flicker Suppression

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High Dynamic Range (HDR) image display systems face issues with flicker and artificial contours due to the difference in bit depth between the image processing apparatus and the display device, where the display device has fewer bits than the processing capability, leading to coarse gradations and noticeable flicker, especially when using time dithering processes.

Innovation Solution

An image processing apparatus that performs time dithering by selectively outputting intermediate pixel values across multiple frames, ensuring a dither frequency of 30 Hz or more, and combines this with spatial dithering and light emission characteristic conversions to maintain smooth gradations and reduce flicker.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If time dithering process is performed to suppress artificial contours, then gradation smoothness is improved, but flicker becomes more conspicuous

Engineering Contradiction:
Improvegradation smoothnessVSAvoidflicker
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent dynamically adjusts the dither frequency based on the frame rate of the display device. By setting the dither frequency to a specific ratio (1/2, 1/3, 1/4, etc.) of the frame rate, the system adapts to different display conditions and maintains optimal performance without causing noticeable flicker, thus dynamically resolving the contradiction between gradation smoothness and flicker suppression.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the key parameter of dither frequency to specific values that are fractions of the frame rate (e.g., 30Hz when frame rate is 60Hz, 24Hz when frame rate is 72Hz). This parameter adjustment ensures that the dithering process remains imperceptible to human vision while still effectively suppressing artificial contours, thereby resolving the contradiction between improving gradation smoothness and avoiding flicker.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If dither frequency is increased to reduce flicker, then flicker suppression is improved, but the number of frames required increases

Engineering Contradiction:
Improveflicker suppressionVSAvoidnumber of frames
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The patent optimizes the dither frequency parameter to specific fractions of the frame rate (1/2, 1/3, 1/4, etc.), which achieves effective flicker suppression while minimizing the computational burden and processing time. This parameter optimization resolves the contradiction by finding the sweet spot where flicker is suppressed without requiring excessive frames or processing time.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If bit depth is reduced to match display device capability, then compatibility is improved, but gradation quality deteriorates

Engineering Contradiction:
Improvedisplay compatibilityVSAvoidgradation quality
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent introduces temporal dimension by distributing the reduced bit-depth information across multiple frames using time dithering. Instead of losing gradation information in the spatial dimension, the system encodes it in the temporal dimension, allowing the display device to reconstruct smoother gradations over time while maintaining compatibility with lower bit-depth displays.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent uses dithering as an intermediary process between the high-bit-depth source image and the low-bit-depth display device. The dithering algorithm acts as a mediator that redistributes quantization errors across multiple frames, preserving gradation information that would otherwise be lost in the bit-depth reduction, thus maintaining gradation quality while ensuring display compatibility.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11637964B2Image processing apparatus, image display system, image processing method having a time dithering process
Publication Date: 2023.04.25 CANON KK
  • US11637964B2 patent drawing
  • US11637964B2 patent drawing
  • US11637964B2 patent drawing

AI summary

An image processing apparatus for performing processing that rounds down C bits from an A-bit image, and that causes a B=(A−C) bit image resulting from the rounding down processing to be displayed comprises a time dithering unit configured to express a pixel value that is an intermediate value of one step in the (A−C) bits in the A-bit image by selectively outputting in each frame across N frames a value where the intermediate value was rounded down and a value where the intermediate value was rounded up, and to artificially express the A-bit image with a dither pattern where the N frames is a minimum unit, wherein the time dithering unit sets the value of N so that M/N is 25 or more.