Time-Domain I/O Circuit for Memory Sensing
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Solution Overview
Problem
Current compute-in-memory systems face challenges in energy consumption and sensing margin during Multiply-Accumulate (MAC) operations, particularly in current-domain and voltage-domain operations, where energy consumption is high and sensing margins are small, making it difficult to accurately determine memory cell states.
Innovation Solution
Implementing a time-domain MAC operation using an Input/Output (I/O) circuit with a sensing node that charges based on bitline discharging, converting voltage or current signals to time signals, thereby increasing the sensing margin and facilitating easier determination of memory cell states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If voltage-domain or current-domain MAC operations are used in compute-in-memory systems, then data processing can be performed at memory cell level, but energy consumption is high and sensing margins are small
Solution Approach 1:
The patent transforms the sensing domain from voltage/current to time domain by measuring the time required for a sensing node to charge to a threshold voltage. This parameter transformation enables larger sensing margins because time measurements are less susceptible to noise and variability, while the charging process itself consumes less energy compared to traditional voltage-domain sensing operations
Solution Approach 2:
The patent replaces the electrical voltage/current measurement mechanism with a time-based measurement mechanism. Instead of directly measuring voltage levels or current magnitudes that have small margins, the system measures the temporal duration of a charging process, which provides inherently larger discrimination margins and lower energy consumption
2Measurement precision
If voltage-domain MAC operations are used, then data processing speed is fast, but sensing margin is small making it difficult to accurately determine memory cell states
Solution Approach 1:
The patent changes the measurement parameter from voltage (with small sensing margins) to time (with large sensing margins). The time-domain measurement of charging duration provides robust discrimination between different memory cell states, significantly improving determination accuracy while maintaining acceptable processing speeds through parallel operation across multiple bitlines
3Productivity
If current-domain MAC operations are used, then compute-in-memory functionality is achieved, but energy consumption is high
Solution Approach 1:
The patent substitutes the energy-intensive current-domain computational mechanism with a time-domain measurement mechanism. The charging of the sensing node through the bitline resistance provides the computational result, and measuring the charging time consumes significantly less energy than maintaining and measuring current levels, while preserving compute-in-memory functionality
Solution Approach 2:
The patent transforms the operational domain from current-based computation to time-based measurement. This parameter transformation maintains the compute-in-memory capability by using the inherent resistance values of memory cells during charging, while reducing energy consumption by eliminating the need for continuous current sourcing and sensing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The time-domain MAC operation enhances sensing margins, improving the accuracy of memory cell state determination and reducing energy consumption compared to traditional voltage-domain and current-domain methods.
Implementation Method 1
a sensing node is charged based on a decrease of a voltage on the bitline
Data Source
AI summary
An Input/Output (I/O) circuit for a memory device is provided. The I/O circuit includes a charge integration circuit coupled to a bitline of the memory device. The charge integration circuit provides a sensing voltage based on a decrease of a voltage on the bitline. A comparator is coupled to the charge integration circuit. The comparator compares the sensing voltage with a reference voltage and provides an output voltage based on the comparison. A time-to-digital converter coupled to the comparator. The time to digital convertor converts a time associated with the output voltage to a digital value.