Time-Encoding Modulator With Filtered Feedback for Low-Power ADCs
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Solution Overview
Problem
Conventional signal modulators, such as sigma-delta modulators, face challenges in scalability and power efficiency due to their reliance on multiple analogue components, which becomes a concern as semiconductor process node geometries shrink, leading to inefficiencies in semiconductor area and power requirements.
Innovation Solution
A time-encoding modulator comprising a hysteretic comparator with a feedback path and a filter arrangement, which encodes analogue input signals into a time-encoded signal, allowing for a smaller and lower power implementation, particularly suitable for use in analogue-to-digital converters (ADCs) and digital-to-analogue converters (DACs).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ADCs and DACs are implemented using multiple analogue components such as banks of well-matched or ratioed resistors, capacitors or current sources, then signal conversion functionality is achieved, but semiconductor area and power requirements increase
Solution Approach 1:
The patent changes the fundamental operating parameters of the modulator by using a hysteretic comparator instead of traditional operational amplifiers, and by implementing noise shaping through feedback of a filtered version of the output signal. This parameter change allows the system to achieve the same signal conversion functionality with significantly reduced semiconductor area and power consumption
Solution Approach 2:
The patent extracts and removes unnecessary components from the conventional modulator architecture. By eliminating operational amplifiers and using only a hysteretic comparator with feedback, the design achieves signal conversion functionality with minimal components, directly reducing semiconductor area requirements
2Reliability
If conventional ADCs and DACs are implemented using multiple analogue components such as banks of well-matched or ratioed resistors, capacitors or current sources, then signal conversion functionality is achieved, but power requirements increase
Solution Approach 1:
The patent changes the fundamental operating parameters by replacing power-hungry operational amplifiers with a low-power hysteretic comparator. The feedback mechanism using a filtered version of the output signal enables noise shaping that maintains signal integrity while significantly reducing power consumption compared to conventional multi-component implementations
3Extent of automation
If sigma-delta modulators are used to convert analogue signals into pulse-density-modulated signals, then time encoding is achieved, but quantisation noise is introduced into the signal
Solution Approach 1:
The patent implements a feedback mechanism where a filtered version of the output signal is fed back to the comparator input. This feedback enables noise shaping that pushes quantisation noise out of the signal band, maintaining signal quality while achieving time encoding functionality
Solution Approach 2:
The patent changes the noise characteristics by using a hysteretic comparator with feedback instead of a conventional sigma-delta modulator architecture. The hysteresis and feedback filtering work together to shape the noise spectrum, reducing in-band quantisation noise while preserving the time-encoded signal
4Extent of automation
If pulse-width modulated signals are generated by comparing the input signal with a periodic reference signal, then time encoding is achieved, but circuitry to generate an appropriately accurate periodic reference signal and operational amplifier circuitry is required
Solution Approach 1:
The patent extracts and removes the periodic reference signal generation circuitry and operational amplifiers from the conventional pulse-width modulator architecture. By using a hysteretic comparator with feedback, the system achieves time encoding functionality without requiring these additional complex components
Solution Approach 2:
The hysteretic comparator with feedback effectively generates its own timing reference through the hysteresis effect and feedback mechanism, eliminating the need for external periodic reference signal generation circuitry. The system serves itself by using the output feedback to control the switching timing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed modulator achieves efficient signal encoding with reduced power consumption and area requirements, enabling scalable and low-power signal conversion, while maintaining high input impedance and linearity, suitable for various applications including ADCs and signal processing circuits.
Implementation Method 1
A time-encoding modulator may comprise a hysteretic comparator with a first comparator input arranged to receive an input signal and a comparator output arranged to provide an output signal. A feedback path may extend from the output node to a second comparator input of the hysteretic comparator. A filter arrangement may be arranged to apply filtering to the feedback path.
Implementation Method 2
A filter arrangement may be arranged to apply filtering to the feedback path
Data Source
AI summary
This application relates time-encoding modulators such as may be used as part of analogue-to-digital conversion. A time-encoding modulator (100) receives an analogue input signal (SIN) at an input node (102) and outputs a corresponding time-encoded signal (SOUT) at an output node (103). A hysteretic comparator (101) has a first comparator input connected to the input node and a comparator output connected to the output node. A feedback path extends between the output node and a second comparator input of the hysteretic comparator; with a filter arrangement (104) arranged to apply filtering to the feedback path. The hysteretic comparator (101) compares the input signal (SIN) to the feedback signal (SFB) with hysteresis. This provides a pulse-width modulated output signal (SOUT) where the duty cycle encodes the input signal (SIN).