Local Time Counters for Latency-Resilient Format Conversion

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Solution Overview

Problem

Existing systems face accuracy degradation and increased complexity due to CPU latency during time format conversions between different time formats, particularly in networks using non-UTC formats like IEEE 1588, which can lead to synchronization issues and require multiple GPS antennas, increasing costs and complexity.

Innovation Solution

A method and device that utilize local counters to account for CPU processing latency by simultaneously counting time in both the initial and target formats, reducing the need for multiple GPS antennas and enabling accurate conversion between various time formats, including UTC and IEEE 1588, using a processor interface and time update controller to manage the conversion process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If time conversion is performed using a processor, then time format conversion capability is achieved, but CPU latency degrades conversion accuracy

Engineering Contradiction:
Improvetime format conversion capabilityVSAvoidtime conversion accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by having the counter start counting adjustment time immediately when the time conversion request is received, before the processor completes the conversion calculation. This ensures that the counter is already running and accounting for time elapsed during processing when the converted time is finally applied, thereby compensating for CPU latency and maintaining conversion accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by continuously monitoring the converted time and comparing it with the current counter value. The system adjusts the counter based on the difference between the converted time and actual elapsed time, creating a closed-loop correction mechanism that compensates for processor latency and ensures accurate time synchronization.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If multiple GPS antennas are deployed to improve time accuracy, then time synchronization accuracy is improved, but system cost and complexity increase

Engineering Contradiction:
Improvetime synchronization accuracyVSAvoidsystem cost and complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies self-service by enabling each local unit to autonomously perform time format conversions using its own counter and processor, without requiring external GPS antennas at every node. The system uses the counter's built-in timing capability to compensate for conversion latency, allowing accurate time synchronization to be achieved through software-based correction rather than hardware redundancy.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If time conversion occurs multiple times through successive conversions, then time format flexibility is improved, but cumulative error increases

Engineering Contradiction:
Improvetime format flexibilityVSAvoidtime accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent extracts the time conversion function from the processor by implementing a dedicated counter that independently tracks adjustment time. This separation allows the counter to continue running accurately even as the processor handles multiple conversion requests, preventing cumulative errors from propagating through successive conversions and maintaining precision across multiple format transformations.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8417981B2Time format conversion method, device and system
Publication Date: 2013.04.09 SIEMENS CANADA LTD
  • US8417981B2 patent drawing
  • US8417981B2 patent drawing
  • US8417981B2 patent drawing

AI summary

A method and device for converting between different time domains at a local unit utilizing an processor is disclosed. Time counters to count time in at least two different formats are located locally at each unit. Once a time conversion is initiated, a time stamp is received by the processor and the time counter in the new time domain commences calculating an adjustment count. Once the converted time is received from the processor, the received time plus the adjustment count are summed to provide a time base for the new time domain. The time counters continue counting in their respective time domains after conversion.