Time-Interleaved Integrators for PPM Receiver Accuracy

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Solution Overview

Problem

Existing high data rate communication systems, particularly those using amplitude modulation, are limited by noise sensitivity and signal losses, and PPM systems struggle with high data rates due to receiver accuracy constraints and require complex, costly hardware.

Innovation Solution

A communication system that employs a PPM receiver with time-interleaving integrators and analog signal processing, allowing for increased data rate reception with improved timing accuracy and reduced form factor, using a clock circuit to generate coordinating clock signals and a combiner to form a demodulated signal from time-integrated signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If PPM systems use traditional monitoring methods to increase data rates, then data rate increases, but receiver accuracy deteriorates due to decreasing time slot widths

Engineering Contradiction:
Improvedata rateVSAvoidreceiver accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The receiver is segmented into multiple parallel time integrators, each handling a specific time slot. This segmentation allows simultaneous processing of multiple pulses within different time slots, maintaining measurement precision even as data rate increases by reducing time slot widths.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from sequential monitoring of time slots to parallel processing across multiple dimensions by using multiple integrators operating simultaneously. This dimensional expansion allows the system to maintain accuracy while handling higher data rates that would otherwise compress time slots beyond reliable detection thresholds.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If optical techniques are used to achieve high data rate reception, then data rate capability increases, but device complexity, cost, and physical form factor increase

Engineering Contradiction:
Improvedata rate reception capabilityVSAvoidhardware complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The invention replaces complex optical techniques with electronic/time-domain processing methods. By using multiple time integrators and analog signal processing in the time domain, the system achieves high data rate reception without requiring sophisticated optical hardware, thereby reducing complexity, cost, and physical form factor.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

Instead of using complex optical hardware, the invention creates multiple copies of simpler integrator circuits that can be implemented using standard electronic components. These replicated integrator units provide the necessary processing capability through parallel operation rather than through complex optical mechanisms.

Inventive Principle:
Principle #26Copying

3Productivity

If AM systems increase clock rate to achieve higher data rates, then data rate increases, but noise sensitivity and signal losses increase

Engineering Contradiction:
Improvedata rateVSAvoidnoise sensitivity
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The system uses periodic clock signals to gate the multiple integrators in a coordinated fashion, with each integrator activated during its specific time slot. This periodic gating allows the system to process higher data rates while maintaining signal integrity by confining integration to precise time windows, thereby reducing noise sensitivity compared to continuous AM detection.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS7349471B2PPM receiving system and method using time-interleaved integrators
Publication Date: 2008.03.25 THE BOEING CO
  • US7349471B2 patent drawing
  • US7349471B2 patent drawing
  • US7349471B2 patent drawing

AI summary

A communication receiver (30) includes a data receiver (34) that receives a pulse-position modulated signal (38). A clock circuit (70) separates a reference clock signal (36) into multiple coordinating clock signals A, B, and C. Multiple time integrators (78) are gated to generate multiple time-integrated signals in response to the pulse-position modulated signal (38) and the coordinating clock signals A, B, and C. A combiner (96) forms a demodulated signal from the time-integrated signals IntA, IntB, and IntC.